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Luca
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SpecialCasesCheck_envsettings.html
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SpecialCasesCheck_envsettings.html
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<HTML><HEAD><TITLE>Xilinx System Settings Report</TITLE></HEAD>
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<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
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<center><big><big><b>System Settings</b></big></big></center><br>
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<A NAME="Environment Settings"></A>
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<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
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<TD ALIGN=CENTER COLSPAN='5'><B> Environment Settings </B></TD>
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</tr>
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<tr bgcolor='#ffff99'>
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<td><b>Environment Variable</b></td>
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<td><b>xst</b></td>
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<td><b>ngdbuild</b></td>
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<td><b>map</b></td>
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<td><b>par</b></td>
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</tr>
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<tr>
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<td>LD_LIBRARY_PATH</td>
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<td>/opt/Xilinx/14.7/ISE_DS/ISE//lib/lin64:<br>/opt/Xilinx/14.7/ISE_DS/ISE/lib/lin64:<br>/opt/Xilinx/14.7/ISE_DS/EDK/lib/lin64:<br>/opt/Xilinx/14.7/ISE_DS/common/lib/lin64</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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<tr>
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<td>PATH</td>
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<td>/opt/Xilinx/14.7/ISE_DS/ISE//bin/lin64:<br>/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64:<br>/opt/Xilinx/14.7/ISE_DS/ISE/sysgen/util:<br>/opt/Xilinx/14.7/ISE_DS/ISE/../../../DocNav:<br>/opt/Xilinx/14.7/ISE_DS/PlanAhead/bin:<br>/opt/Xilinx/14.7/ISE_DS/EDK/bin/lin64:<br>/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/lin/bin:<br>/opt/Xilinx/14.7/ISE_DS/EDK/gnu/powerpc-eabi/lin/bin:<br>/opt/Xilinx/14.7/ISE_DS/EDK/gnu/arm/lin/bin:<br>/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_be/bin:<br>/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_le/bin:<br>/opt/Xilinx/14.7/ISE_DS/common/bin/lin64:<br>/usr/lib64/qt-3.3/bin:<br>/usr/local/bin:<br>/usr/bin:<br>/bin:<br>/usr/local/sbin:<br>/usr/sbin:<br>/sbin:<br>/home/Luca/bin</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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<tr>
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<td>XILINX</td>
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<td>/opt/Xilinx/14.7/ISE_DS/ISE/</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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<tr>
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<td>XILINX_DSP</td>
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<td>/opt/Xilinx/14.7/ISE_DS/ISE</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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<tr>
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<td>XILINX_EDK</td>
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<td>/opt/Xilinx/14.7/ISE_DS/EDK</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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<tr>
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<td>XILINX_PLANAHEAD</td>
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<td>/opt/Xilinx/14.7/ISE_DS/PlanAhead</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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</TABLE>
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<A NAME="Synthesis Property Settings"></A>
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<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
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<TD ALIGN=CENTER COLSPAN='4'><B>Synthesis Property Settings </B></TD>
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</tr>
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<tr bgcolor='#ffff99'>
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<td><b>Switch Name</b></td>
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<td><b>Property Name</b></td>
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<td><b>Value</b></td>
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<td><b>Default Value</b></td>
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</tr>
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<tr>
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<td>-ifn</td>
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<td> </td>
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<td>SpecialCasesCheck.prj</td>
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<td> </td>
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</tr>
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<tr>
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<td>-ifmt</td>
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<td> </td>
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<td>mixed</td>
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<td>MIXED</td>
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</tr>
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<tr>
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<td>-ofn</td>
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<td> </td>
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<td>SpecialCasesCheck</td>
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<td> </td>
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</tr>
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<tr>
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<td>-ofmt</td>
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<td> </td>
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<td>NGC</td>
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<td>NGC</td>
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</tr>
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<tr>
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<td>-p</td>
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<td> </td>
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<td>xc3s50-5-pq208</td>
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<td> </td>
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</tr>
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<tr>
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<td>-top</td>
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<td> </td>
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<td>SpecialCasesCheck</td>
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<td> </td>
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</tr>
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<tr>
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<td>-opt_mode</td>
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<td>Optimization Goal</td>
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<td>Speed</td>
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<td>SPEED</td>
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</tr>
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<tr>
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<td>-opt_level</td>
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<td>Optimization Effort</td>
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<td>1</td>
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<td>1</td>
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</tr>
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<tr>
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<td>-iuc</td>
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<td>Use synthesis Constraints File</td>
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<td>NO</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-keep_hierarchy</td>
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<td>Keep Hierarchy</td>
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<td>No</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-netlist_hierarchy</td>
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<td>Netlist Hierarchy</td>
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<td>As_Optimized</td>
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<td>as_optimized</td>
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</tr>
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<tr>
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<td>-rtlview</td>
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<td>Generate RTL Schematic</td>
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<td>Yes</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-glob_opt</td>
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<td>Global Optimization Goal</td>
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<td>AllClockNets</td>
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<td>ALLCLOCKNETS</td>
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</tr>
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<tr>
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<td>-read_cores</td>
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<td>Read Cores</td>
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<td>YES</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-write_timing_constraints</td>
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<td>Write Timing Constraints</td>
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<td>NO</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-cross_clock_analysis</td>
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<td>Cross Clock Analysis</td>
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<td>NO</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-bus_delimiter</td>
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<td>Bus Delimiter</td>
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<td><></td>
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<td><></td>
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</tr>
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<tr>
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<td>-slice_utilization_ratio</td>
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<td>Slice Utilization Ratio</td>
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<td>100</td>
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<td>100%</td>
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</tr>
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<tr>
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<td>-bram_utilization_ratio</td>
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<td>BRAM Utilization Ratio</td>
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<td>100</td>
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<td>100%</td>
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</tr>
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<tr>
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<td>-verilog2001</td>
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<td>Verilog 2001</td>
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<td>YES</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-fsm_extract</td>
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<td> </td>
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<td>YES</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-fsm_encoding</td>
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<td> </td>
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<td>Auto</td>
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<td>AUTO</td>
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</tr>
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<tr>
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<td>-safe_implementation</td>
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<td> </td>
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<td>No</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-fsm_style</td>
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<td> </td>
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<td>LUT</td>
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<td>LUT</td>
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</tr>
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<tr>
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<td>-ram_extract</td>
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<td> </td>
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<td>Yes</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-ram_style</td>
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<td> </td>
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<td>Auto</td>
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<td>AUTO</td>
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</tr>
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<tr>
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<td>-rom_extract</td>
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<td> </td>
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<td>Yes</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-shreg_extract</td>
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<td> </td>
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<td>YES</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-rom_style</td>
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<td> </td>
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<td>Auto</td>
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<td>AUTO</td>
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</tr>
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<tr>
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<td>-auto_bram_packing</td>
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<td> </td>
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<td>NO</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-resource_sharing</td>
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<td> </td>
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<td>YES</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-async_to_sync</td>
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<td> </td>
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<td>NO</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-mult_style</td>
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<td> </td>
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<td>Auto</td>
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<td>AUTO</td>
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</tr>
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<tr>
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<td>-iobuf</td>
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<td> </td>
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<td>YES</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-max_fanout</td>
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<td> </td>
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<td>500</td>
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<td>500</td>
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</tr>
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<tr>
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<td>-bufg</td>
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<td> </td>
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<td>8</td>
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<td>8</td>
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</tr>
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<tr>
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<td>-register_duplication</td>
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<td> </td>
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<td>YES</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-register_balancing</td>
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<td> </td>
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<td>No</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-optimize_primitives</td>
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<td> </td>
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<td>NO</td>
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<td>NO</td>
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</tr>
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<tr>
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<td>-use_clock_enable</td>
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<td> </td>
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<td>Yes</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-use_sync_set</td>
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<td> </td>
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<td>Yes</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-use_sync_reset</td>
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<td> </td>
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<td>Yes</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-iob</td>
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<td> </td>
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<td>Auto</td>
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<td>AUTO</td>
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</tr>
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<tr>
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<td>-equivalent_register_removal</td>
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<td> </td>
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<td>YES</td>
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<td>YES</td>
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</tr>
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<tr>
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<td>-slice_utilization_ratio_maxmargin</td>
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<td> </td>
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<td>5</td>
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<td>0%</td>
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</tr>
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</TABLE>
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<A NAME="Operating System Information"></A>
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<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
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<TD ALIGN=CENTER COLSPAN='5'><B> Operating System Information </B></TD>
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</tr>
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<tr bgcolor='#ffff99'>
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<td><b>Operating System Information</b></td>
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<td><b>xst</b></td>
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<td><b>ngdbuild</b></td>
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<td><b>map</b></td>
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<td><b>par</b></td>
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</tr>
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<tr>
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<td>CPU Architecture/Speed</td>
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<td>Intel Core Processor (Haswell, no TSX)/2494.222 MHz</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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<tr>
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<td>Host</td>
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<td>Xilinx</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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<tr>
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<td>OS Name</td>
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<td>CentOS</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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<tr>
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<td>OS Release</td>
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<td>CentOS release 6.10 (Final)</td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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<td><font color=gray>< data not available ></font></td>
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</tr>
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</TABLE>
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</BODY> </HTML>
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