Comopletato sommatore-sottrattore con test
This commit is contained in:
1 parent
b6c1d7abe2
commit
6c5accaabe
196 files changed
+231
-16789
No files matched your search
@@ -72,3 +72,7 @@ _ngo/
|
|||||||
_xmsgs/
|
_xmsgs/
|
||||||
|
|
||||||
# End of https://www.gitignore.io/api/xilinxise
|
# End of https://www.gitignore.io/api/xilinxise
|
||||||
|
|
||||||
|
|
||||||
|
# Fuck isim
|
||||||
|
isim/
|
||||||
+27
-5
@@ -1,20 +1,42 @@
|
|||||||
library IEEE;
|
library IEEE;
|
||||||
use IEEE.STD_LOGIC_1164.ALL;
|
use IEEE.STD_LOGIC_1164.ALL;
|
||||||
|
|
||||||
|
|
||||||
entity AddSub is
|
entity AddSub is
|
||||||
generic( BITCOUNT: integer := 8 );
|
generic( BITCOUNT: integer := 8 );
|
||||||
port(
|
port(
|
||||||
X, Y: in std_logic_vector((BITCOUNT-1) downto 0);
|
X, Y: in std_logic_vector((BITCOUNT-1) downto 0);
|
||||||
isSub: in std_logic := 0;
|
isSub: in std_logic := '0';
|
||||||
result: out std_logic_vector((BITCOUNT-1) downto 0)
|
result: out std_logic_vector((BITCOUNT-1) downto 0);
|
||||||
|
overflow: out std_logic
|
||||||
);
|
);
|
||||||
end AddSub;
|
end AddSub;
|
||||||
|
|
||||||
architecture CLAAddSubArch of AddSub is
|
|
||||||
|
|
||||||
|
architecture AddSubArch of AddSub is
|
||||||
|
component Adder is
|
||||||
|
generic( BITCOUNT: integer := 8 );
|
||||||
|
port(
|
||||||
|
X, Y: in std_logic_vector((BITCOUNT-1) downto 0);
|
||||||
|
carry_in: in std_logic;
|
||||||
|
result: out std_logic_vector((BITCOUNT-1) downto 0);
|
||||||
|
carry_out: out std_logic
|
||||||
|
);
|
||||||
|
end component;
|
||||||
|
|
||||||
|
signal Y2: std_logic_vector((BITCOUNT-1) downto 0);
|
||||||
|
signal C_out: std_logic;
|
||||||
begin
|
begin
|
||||||
|
|
||||||
|
y2proc: process(Y, isSub)
|
||||||
|
begin
|
||||||
|
for i in Y2'range loop
|
||||||
|
Y2(i) <= Y(i) xor isSub;
|
||||||
|
end loop;
|
||||||
|
end process;
|
||||||
|
|
||||||
end CLAAddSubArch;
|
ADD: Adder
|
||||||
|
generic map ( BITCOUNT => BITCOUNT )
|
||||||
|
port map ( X => X, Y => Y2, carry_in => isSub, result => result, carry_out => C_out );
|
||||||
|
|
||||||
|
overflow <= ((not isSub) and C_out) or (isSub and (not C_out));
|
||||||
|
end AddSubArch;
|
||||||
+127
@@ -0,0 +1,127 @@
|
|||||||
|
LIBRARY ieee;
|
||||||
|
USE ieee.std_logic_1164.ALL;
|
||||||
|
|
||||||
|
|
||||||
|
ENTITY AddSubTest IS
|
||||||
|
END AddSubTest;
|
||||||
|
|
||||||
|
ARCHITECTURE behavior OF AddSubTest IS
|
||||||
|
|
||||||
|
-- Component Declaration for the Unit Under Test (UUT)
|
||||||
|
|
||||||
|
COMPONENT AddSub
|
||||||
|
PORT(
|
||||||
|
X : IN std_logic_vector(7 downto 0);
|
||||||
|
Y : IN std_logic_vector(7 downto 0);
|
||||||
|
isSub : IN std_logic;
|
||||||
|
result : OUT std_logic_vector(7 downto 0);
|
||||||
|
overflow : OUT std_logic
|
||||||
|
);
|
||||||
|
END COMPONENT;
|
||||||
|
|
||||||
|
|
||||||
|
--Inputs
|
||||||
|
signal X : std_logic_vector(7 downto 0) := (others => '0');
|
||||||
|
signal Y : std_logic_vector(7 downto 0) := (others => '0');
|
||||||
|
signal isSub : std_logic := '0';
|
||||||
|
|
||||||
|
--Outputs
|
||||||
|
signal result : std_logic_vector(7 downto 0);
|
||||||
|
signal overflow : std_logic;
|
||||||
|
|
||||||
|
signal clock: std_logic;
|
||||||
|
constant clock_period : time := 10 ns;
|
||||||
|
|
||||||
|
BEGIN
|
||||||
|
|
||||||
|
-- Instantiate the Unit Under Test (UUT)
|
||||||
|
uut: AddSub PORT MAP (
|
||||||
|
X => X,
|
||||||
|
Y => Y,
|
||||||
|
isSub => isSub,
|
||||||
|
result => result,
|
||||||
|
overflow => overflow
|
||||||
|
);
|
||||||
|
|
||||||
|
-- Clock process definitions
|
||||||
|
clock_process :process
|
||||||
|
begin
|
||||||
|
clock <= '0';
|
||||||
|
wait for clock_period/2;
|
||||||
|
clock <= '1';
|
||||||
|
wait for clock_period/2;
|
||||||
|
end process;
|
||||||
|
|
||||||
|
|
||||||
|
test_proc: process
|
||||||
|
begin
|
||||||
|
X <= "00110011";
|
||||||
|
Y <= "11001100";
|
||||||
|
isSub <= '0';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "10010111";
|
||||||
|
Y <= "11100011";
|
||||||
|
isSub <= '0';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "10000101";
|
||||||
|
Y <= "01111011";
|
||||||
|
isSub <= '0';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "11111111";
|
||||||
|
Y <= "11111111";
|
||||||
|
isSub <= '0';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "00101011";
|
||||||
|
Y <= "00101010";
|
||||||
|
isSub <= '0';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "11111111";
|
||||||
|
Y <= "11111111";
|
||||||
|
isSub <= '0';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "10000000";
|
||||||
|
Y <= "10000000";
|
||||||
|
isSub <= '0';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "00000000";
|
||||||
|
Y <= "11111111";
|
||||||
|
isSub <= '0';
|
||||||
|
X <= "00110011";
|
||||||
|
Y <= "11001100";
|
||||||
|
isSub <= '1';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "10010111";
|
||||||
|
Y <= "11100011";
|
||||||
|
isSub <= '1';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "10000101";
|
||||||
|
Y <= "01111011";
|
||||||
|
isSub <= '1';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "11111111";
|
||||||
|
Y <= "11111111";
|
||||||
|
isSub <= '1';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "00101011";
|
||||||
|
Y <= "00101010";
|
||||||
|
isSub <= '1';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "11111111";
|
||||||
|
Y <= "11111111";
|
||||||
|
isSub <= '1';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "10000000";
|
||||||
|
Y <= "10000000";
|
||||||
|
isSub <= '1';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "00000000";
|
||||||
|
Y <= "11111111";
|
||||||
|
isSub <= '1';
|
||||||
|
wait for clock_period;
|
||||||
|
X <= "11111111";
|
||||||
|
Y <= "00000000";
|
||||||
|
isSub <= '1';
|
||||||
|
wait for clock_period;
|
||||||
|
end process;
|
||||||
|
|
||||||
|
END;
|
||||||
Executable
BIN
Binary file not shown.
Binary file not shown.
@@ -22,15 +22,18 @@ begin
|
|||||||
propagation <= X or Y;
|
propagation <= X or Y;
|
||||||
sum_no_carry <= X xor Y;
|
sum_no_carry <= X xor Y;
|
||||||
|
|
||||||
carry_look_ahead: process (generation, propagation, carry, carry_in)
|
carry_look_ahead: process (generation, propagation, carry_in)
|
||||||
|
variable C: std_logic;
|
||||||
begin
|
begin
|
||||||
carry(0) <= carry_in;
|
C := carry_in;
|
||||||
for i in (BITCOUNT-1) downto 1 loop
|
carry(0) <= C;
|
||||||
carry(i) <= generation(i) or (propagation(i) and carry(i-1));
|
for i in 1 to (BITCOUNT-1) loop
|
||||||
|
C := generation(i-1) or (propagation(i-1) and C);
|
||||||
|
carry(i) <= C;
|
||||||
end loop;
|
end loop;
|
||||||
end process;
|
end process;
|
||||||
|
|
||||||
result <= sum_no_carry xor carry;
|
result <= sum_no_carry xor carry;
|
||||||
carry_out <= sum_no_carry(BITCOUNT-1) xor carry(BITCOUNT-1);
|
carry_out <= (X(BITCOUNT-1) and Y(BITCOUNT-1)) or (X(BITCOUNT-1) and carry(BITCOUNT-1)) or (carry(BITCOUNT-1) and Y(BITCOUNT-1));
|
||||||
end CarryLookAheadArch;
|
end CarryLookAheadArch;
|
||||||
|
|
||||||
@@ -1,37 +1,6 @@
|
|||||||
--------------------------------------------------------------------------------
|
|
||||||
-- Company:
|
|
||||||
-- Engineer:
|
|
||||||
--
|
|
||||||
-- Create Date: 17:01:26 08/24/2019
|
|
||||||
-- Design Name:
|
|
||||||
-- Module Name: /home/Luca/ISE/IEEE754Adder/AdderTest.vhd
|
|
||||||
-- Project Name: IEEE754Adder
|
|
||||||
-- Target Device:
|
|
||||||
-- Tool versions:
|
|
||||||
-- Description:
|
|
||||||
--
|
|
||||||
-- VHDL Test Bench Created by ISE for module: Adder
|
|
||||||
--
|
|
||||||
-- Dependencies:
|
|
||||||
--
|
|
||||||
-- Revision:
|
|
||||||
-- Revision 0.01 - File Created
|
|
||||||
-- Additional Comments:
|
|
||||||
--
|
|
||||||
-- Notes:
|
|
||||||
-- This testbench has been automatically generated using types std_logic and
|
|
||||||
-- std_logic_vector for the ports of the unit under test. Xilinx recommends
|
|
||||||
-- that these types always be used for the top-level I/O of a design in order
|
|
||||||
-- to guarantee that the testbench will bind correctly to the post-implementation
|
|
||||||
-- simulation model.
|
|
||||||
--------------------------------------------------------------------------------
|
|
||||||
LIBRARY ieee;
|
LIBRARY ieee;
|
||||||
USE ieee.std_logic_1164.ALL;
|
USE ieee.std_logic_1164.ALL;
|
||||||
|
|
||||||
-- Uncomment the following library declaration if using
|
|
||||||
-- arithmetic functions with Signed or Unsigned values
|
|
||||||
--USE ieee.numeric_std.ALL;
|
|
||||||
|
|
||||||
ENTITY AdderTest IS
|
ENTITY AdderTest IS
|
||||||
END AdderTest;
|
END AdderTest;
|
||||||
|
|
||||||
|
|||||||
Binary file not shown.
+38
-21
@@ -17,23 +17,23 @@
|
|||||||
<files>
|
<files>
|
||||||
<file xil_pn:name="SpecialCasesCheck.vhd" xil_pn:type="FILE_VHDL">
|
<file xil_pn:name="SpecialCasesCheck.vhd" xil_pn:type="FILE_VHDL">
|
||||||
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
||||||
<association xil_pn:name="Implementation" xil_pn:seqID="5"/>
|
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
|
||||||
</file>
|
</file>
|
||||||
<file xil_pn:name="TypeCheck.vhd" xil_pn:type="FILE_VHDL">
|
<file xil_pn:name="TypeCheck.vhd" xil_pn:type="FILE_VHDL">
|
||||||
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
||||||
<association xil_pn:name="Implementation" xil_pn:seqID="1"/>
|
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
|
||||||
</file>
|
</file>
|
||||||
<file xil_pn:name="NaNCheck.vhd" xil_pn:type="FILE_VHDL">
|
<file xil_pn:name="NaNCheck.vhd" xil_pn:type="FILE_VHDL">
|
||||||
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
||||||
<association xil_pn:name="Implementation" xil_pn:seqID="4"/>
|
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
|
||||||
</file>
|
</file>
|
||||||
<file xil_pn:name="ZeroCheck.vhd" xil_pn:type="FILE_VHDL">
|
<file xil_pn:name="ZeroCheck.vhd" xil_pn:type="FILE_VHDL">
|
||||||
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
||||||
<association xil_pn:name="Implementation" xil_pn:seqID="3"/>
|
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
|
||||||
</file>
|
</file>
|
||||||
<file xil_pn:name="EqualCheck.vhd" xil_pn:type="FILE_VHDL">
|
<file xil_pn:name="EqualCheck.vhd" xil_pn:type="FILE_VHDL">
|
||||||
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
||||||
<association xil_pn:name="Implementation" xil_pn:seqID="2"/>
|
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
|
||||||
</file>
|
</file>
|
||||||
<file xil_pn:name="SpecialCasesTest.vhd" xil_pn:type="FILE_VHDL">
|
<file xil_pn:name="SpecialCasesTest.vhd" xil_pn:type="FILE_VHDL">
|
||||||
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
||||||
@@ -74,15 +74,29 @@
|
|||||||
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
|
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
|
||||||
</file>
|
</file>
|
||||||
<file xil_pn:name="FullAdder.vhd" xil_pn:type="FILE_VHDL">
|
<file xil_pn:name="FullAdder.vhd" xil_pn:type="FILE_VHDL">
|
||||||
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/>
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
||||||
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
|
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
|
||||||
</file>
|
</file>
|
||||||
<file xil_pn:name="FullAdderTest.vhd" xil_pn:type="FILE_VHDL">
|
<file xil_pn:name="FullAdderTest.vhd" xil_pn:type="FILE_VHDL">
|
||||||
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
|
||||||
<association xil_pn:name="PostMapSimulation" xil_pn:seqID="195"/>
|
<association xil_pn:name="PostMapSimulation" xil_pn:seqID="195"/>
|
||||||
<association xil_pn:name="PostRouteSimulation" xil_pn:seqID="195"/>
|
<association xil_pn:name="PostRouteSimulation" xil_pn:seqID="195"/>
|
||||||
<association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="195"/>
|
<association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="195"/>
|
||||||
</file>
|
</file>
|
||||||
|
<file xil_pn:name="Adder.vhd" xil_pn:type="FILE_VHDL">
|
||||||
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/>
|
||||||
|
<association xil_pn:name="Implementation" xil_pn:seqID="1"/>
|
||||||
|
</file>
|
||||||
|
<file xil_pn:name="AddSub.vhd" xil_pn:type="FILE_VHDL">
|
||||||
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
|
||||||
|
<association xil_pn:name="Implementation" xil_pn:seqID="2"/>
|
||||||
|
</file>
|
||||||
|
<file xil_pn:name="AddSubTest.vhd" xil_pn:type="FILE_VHDL">
|
||||||
|
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="3"/>
|
||||||
|
<association xil_pn:name="PostMapSimulation" xil_pn:seqID="179"/>
|
||||||
|
<association xil_pn:name="PostRouteSimulation" xil_pn:seqID="179"/>
|
||||||
|
<association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="179"/>
|
||||||
|
</file>
|
||||||
</files>
|
</files>
|
||||||
|
|
||||||
<properties>
|
<properties>
|
||||||
@@ -203,9 +217,9 @@
|
|||||||
<property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
|
<property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Ignore User Timing Constraints Map" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Ignore User Timing Constraints Map" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Ignore User Timing Constraints Par" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Ignore User Timing Constraints Par" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Implementation Top" xil_pn:value="Architecture|SpecialCasesCheck|SpecialCasesCheckArch" xil_pn:valueState="non-default"/>
|
<property xil_pn:name="Implementation Top" xil_pn:value="Architecture|AddSub|AddSubArch" xil_pn:valueState="non-default"/>
|
||||||
<property xil_pn:name="Implementation Top File" xil_pn:value="SpecialCasesCheck.vhd" xil_pn:valueState="non-default"/>
|
<property xil_pn:name="Implementation Top File" xil_pn:value="AddSub.vhd" xil_pn:valueState="non-default"/>
|
||||||
<property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/SpecialCasesCheck" xil_pn:valueState="non-default"/>
|
<property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/AddSub" xil_pn:valueState="non-default"/>
|
||||||
<property xil_pn:name="Include 'uselib Directive in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Include 'uselib Directive in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Include SIMPRIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Include SIMPRIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Include UNISIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Include UNISIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
@@ -274,7 +288,7 @@
|
|||||||
<property xil_pn:name="Other XPWR Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
|
<property xil_pn:name="Other XPWR Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Other XST Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
|
<property xil_pn:name="Other XST Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Output Extended Identifiers" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Output Extended Identifiers" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Output File Name" xil_pn:value="SpecialCasesCheck" xil_pn:valueState="default"/>
|
<property xil_pn:name="Output File Name" xil_pn:value="AddSub" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Overwrite Compiled Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Overwrite Compiled Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Pack I/O Registers into IOBs" xil_pn:value="Auto" xil_pn:valueState="default"/>
|
<property xil_pn:name="Pack I/O Registers into IOBs" xil_pn:value="Auto" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Pack I/O Registers/Latches into IOBs" xil_pn:value="Off" xil_pn:valueState="default"/>
|
<property xil_pn:name="Pack I/O Registers/Latches into IOBs" xil_pn:value="Off" xil_pn:valueState="default"/>
|
||||||
@@ -289,10 +303,10 @@
|
|||||||
<property xil_pn:name="Placer Effort Level Map" xil_pn:value="High" xil_pn:valueState="default"/>
|
<property xil_pn:name="Placer Effort Level Map" xil_pn:value="High" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Placer Extra Effort Map" xil_pn:value="None" xil_pn:valueState="default"/>
|
<property xil_pn:name="Placer Extra Effort Map" xil_pn:value="None" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Port to be used" xil_pn:value="Auto - default" xil_pn:valueState="default"/>
|
<property xil_pn:name="Port to be used" xil_pn:value="Auto - default" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Post Map Simulation Model Name" xil_pn:value="SpecialCasesCheck_map.vhd" xil_pn:valueState="default"/>
|
<property xil_pn:name="Post Map Simulation Model Name" xil_pn:value="AddSub_map.vhd" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Post Place & Route Simulation Model Name" xil_pn:value="SpecialCasesCheck_timesim.vhd" xil_pn:valueState="default"/>
|
<property xil_pn:name="Post Place & Route Simulation Model Name" xil_pn:value="AddSub_timesim.vhd" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Post Synthesis Simulation Model Name" xil_pn:value="SpecialCasesCheck_synthesis.vhd" xil_pn:valueState="default"/>
|
<property xil_pn:name="Post Synthesis Simulation Model Name" xil_pn:value="AddSub_synthesis.vhd" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Post Translate Simulation Model Name" xil_pn:value="SpecialCasesCheck_translate.vhd" xil_pn:valueState="default"/>
|
<property xil_pn:name="Post Translate Simulation Model Name" xil_pn:value="AddSub_translate.vhd" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Power Reduction Map" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Power Reduction Map" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Power Reduction Map spartan6" xil_pn:value="Off" xil_pn:valueState="default"/>
|
<property xil_pn:name="Power Reduction Map spartan6" xil_pn:value="Off" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Power Reduction Par" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Power Reduction Par" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
@@ -316,7 +330,7 @@
|
|||||||
<property xil_pn:name="Release Write Enable (Output Events)" xil_pn:value="Default (6)" xil_pn:valueState="default"/>
|
<property xil_pn:name="Release Write Enable (Output Events)" xil_pn:value="Default (6)" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Rename Design Instance in Testbench File to" xil_pn:value="UUT" xil_pn:valueState="default"/>
|
<property xil_pn:name="Rename Design Instance in Testbench File to" xil_pn:value="UUT" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Rename Top Level Architecture To" xil_pn:value="Structure" xil_pn:valueState="default"/>
|
<property xil_pn:name="Rename Top Level Architecture To" xil_pn:value="Structure" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Rename Top Level Entity to" xil_pn:value="SpecialCasesCheck" xil_pn:valueState="default"/>
|
<property xil_pn:name="Rename Top Level Entity to" xil_pn:value="AddSub" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Rename Top Level Module To" xil_pn:value="" xil_pn:valueState="default"/>
|
<property xil_pn:name="Rename Top Level Module To" xil_pn:value="" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Report Fastest Path(s) in Each Constraint" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Report Fastest Path(s) in Each Constraint" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Report Fastest Path(s) in Each Constraint Post Trace" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Report Fastest Path(s) in Each Constraint Post Trace" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
@@ -340,8 +354,8 @@
|
|||||||
<property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
|
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Security" xil_pn:value="Enable Readback and Reconfiguration" xil_pn:valueState="default"/>
|
<property xil_pn:name="Security" xil_pn:value="Enable Readback and Reconfiguration" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Selected Module Instance Name" xil_pn:value="/FullAdderTest" xil_pn:valueState="non-default"/>
|
<property xil_pn:name="Selected Module Instance Name" xil_pn:value="/AddSubTest" xil_pn:valueState="non-default"/>
|
||||||
<property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="work.FullAdderTest" xil_pn:valueState="non-default"/>
|
<property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="work.AddSubTest" xil_pn:valueState="non-default"/>
|
||||||
<property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
|
<property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Selected Simulation Root Source Node Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
|
<property xil_pn:name="Selected Simulation Root Source Node Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Selected Simulation Root Source Node Post-Translate" xil_pn:value="" xil_pn:valueState="default"/>
|
<property xil_pn:name="Selected Simulation Root Source Node Post-Translate" xil_pn:value="" xil_pn:valueState="default"/>
|
||||||
@@ -360,7 +374,7 @@
|
|||||||
<property xil_pn:name="Slice Packing" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Slice Packing" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Slice Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
|
<property xil_pn:name="Slice Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Specify 'define Macro Name and Value" xil_pn:value="" xil_pn:valueState="default"/>
|
<property xil_pn:name="Specify 'define Macro Name and Value" xil_pn:value="" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Specify Top Level Instance Names Behavioral" xil_pn:value="work.FullAdderTest" xil_pn:valueState="default"/>
|
<property xil_pn:name="Specify Top Level Instance Names Behavioral" xil_pn:value="work.AddSubTest" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Specify Top Level Instance Names Post-Map" xil_pn:value="Default" xil_pn:valueState="default"/>
|
<property xil_pn:name="Specify Top Level Instance Names Post-Map" xil_pn:value="Default" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="Default" xil_pn:valueState="default"/>
|
<property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="Default" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Specify Top Level Instance Names Post-Translate" xil_pn:value="Default" xil_pn:valueState="default"/>
|
<property xil_pn:name="Specify Top Level Instance Names Post-Translate" xil_pn:value="Default" xil_pn:valueState="default"/>
|
||||||
@@ -416,7 +430,7 @@
|
|||||||
<!-- -->
|
<!-- -->
|
||||||
<!-- The following properties are for internal use only. These should not be modified.-->
|
<!-- The following properties are for internal use only. These should not be modified.-->
|
||||||
<!-- -->
|
<!-- -->
|
||||||
<property xil_pn:name="PROP_BehavioralSimTop" xil_pn:value="Architecture|FullAdderTest|behavior" xil_pn:valueState="non-default"/>
|
<property xil_pn:name="PROP_BehavioralSimTop" xil_pn:value="Architecture|AddSubTest|behavior" xil_pn:valueState="non-default"/>
|
||||||
<property xil_pn:name="PROP_DesignName" xil_pn:value="" xil_pn:valueState="default"/>
|
<property xil_pn:name="PROP_DesignName" xil_pn:value="" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="aspartan6" xil_pn:valueState="default"/>
|
<property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="aspartan6" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="PROP_FPGAConfiguration" xil_pn:value="FPGAConfiguration" xil_pn:valueState="default"/>
|
<property xil_pn:name="PROP_FPGAConfiguration" xil_pn:value="FPGAConfiguration" xil_pn:valueState="default"/>
|
||||||
@@ -433,7 +447,10 @@
|
|||||||
|
|
||||||
<bindings/>
|
<bindings/>
|
||||||
|
|
||||||
<libraries/>
|
<libraries>
|
||||||
|
<library xil_pn:name="AddSub"/>
|
||||||
|
<library xil_pn:name="Adder"/>
|
||||||
|
</libraries>
|
||||||
|
|
||||||
<autoManagedFiles>
|
<autoManagedFiles>
|
||||||
<!-- The following files are identified by `include statements in verilog -->
|
<!-- The following files are identified by `include statements in verilog -->
|
||||||
|
|||||||
+1
-1
@@ -5,7 +5,7 @@ entity TwoComplement is
|
|||||||
generic(BITCOUNT : integer := 8);
|
generic(BITCOUNT : integer := 8);
|
||||||
port(
|
port(
|
||||||
DIFF_EXP_C2 : in std_logic_vector((BITCOUNT-1) downto 0);
|
DIFF_EXP_C2 : in std_logic_vector((BITCOUNT-1) downto 0);
|
||||||
DIFF_EXP_ABS : out std_logic_vector((BITCOUNT-2) downto 0);
|
DIFF_EXP_ABS : out std_logic_vector((BITCOUNT-2) downto 0)
|
||||||
);
|
);
|
||||||
end TwoComplement;
|
end TwoComplement;
|
||||||
|
|
||||||
|
|||||||
@@ -1,21 +1,24 @@
|
|||||||
Running: /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/unwrapped/fuse -relaunch -intstyle "ise" -incremental -lib "secureip" -o "/home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe" -prj "/home/ise/gianni/IEEE754Adder/FullAdderTest_beh.prj" "work.FullAdderTest"
|
Running: /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/unwrapped/fuse -intstyle ise -incremental -lib secureip -o /home/Luca/ISE/IEEE754Adder/AddSubTest_isim_beh.exe -prj /home/Luca/ISE/IEEE754Adder/AddSubTest_beh.prj work.AddSubTest
|
||||||
ISim P.20160913 (signature 0xfbc00daa)
|
ISim P.20131013 (signature 0xfbc00daa)
|
||||||
Number of CPUs detected in this system: 1
|
Number of CPUs detected in this system: 4
|
||||||
Turning on mult-threading, number of parallel sub-compilation jobs: 0
|
Turning on mult-threading, number of parallel sub-compilation jobs: 8
|
||||||
Determining compilation order of HDL files
|
Determining compilation order of HDL files
|
||||||
Parsing VHDL file "/home/ise/gianni/IEEE754Adder/FullAdder.vhd" into library work
|
Parsing VHDL file "/home/Luca/ISE/IEEE754Adder/Adder.vhd" into library work
|
||||||
Parsing VHDL file "/home/ise/gianni/IEEE754Adder/FullAdderTest.vhd" into library work
|
Parsing VHDL file "/home/Luca/ISE/IEEE754Adder/AddSub.vhd" into library work
|
||||||
|
Parsing VHDL file "/home/Luca/ISE/IEEE754Adder/AddSubTest.vhd" into library work
|
||||||
Starting static elaboration
|
Starting static elaboration
|
||||||
Completed static elaboration
|
Completed static elaboration
|
||||||
Fuse Memory Usage: 95308 KB
|
Fuse Memory Usage: 94376 KB
|
||||||
Fuse CPU Usage: 2530 ms
|
Fuse CPU Usage: 1040 ms
|
||||||
Compiling package standard
|
Compiling package standard
|
||||||
Compiling package std_logic_1164
|
Compiling package std_logic_1164
|
||||||
Compiling architecture fulladderarch of entity FullAdder [fulladder_default]
|
Compiling architecture carrylookaheadarch of entity Adder [\Adder(8)\]
|
||||||
Compiling architecture behavior of entity fulladdertest
|
Compiling architecture addsubarch of entity AddSub [\AddSub(8)\]
|
||||||
|
Compiling architecture behavior of entity addsubtest
|
||||||
Time Resolution for simulation is 1ps.
|
Time Resolution for simulation is 1ps.
|
||||||
Compiled 5 VHDL Units
|
Waiting for 1 sub-compilation(s) to finish...
|
||||||
Built simulation executable /home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe
|
Compiled 7 VHDL Units
|
||||||
Fuse Memory Usage: 103940 KB
|
Built simulation executable /home/Luca/ISE/IEEE754Adder/AddSubTest_isim_beh.exe
|
||||||
Fuse CPU Usage: 2640 ms
|
Fuse Memory Usage: 658004 KB
|
||||||
GCC CPU Usage: 440 ms
|
Fuse CPU Usage: 1060 ms
|
||||||
|
GCC CPU Usage: 210 ms
|
||||||
+1
-1
@@ -1 +1 @@
|
|||||||
-intstyle "ise" -incremental -lib "secureip" -o "/home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe" -prj "/home/ise/gianni/IEEE754Adder/FullAdderTest_beh.prj" "work.FullAdderTest"
|
-intstyle "ise" -incremental -lib "secureip" -o "/home/Luca/ISE/IEEE754Adder/AddSubTest_isim_beh.exe" -prj "/home/Luca/ISE/IEEE754Adder/AddSubTest_beh.prj" "work.AddSubTest"
|
||||||
@@ -1,26 +1,14 @@
|
|||||||
ISim log file
|
ISim log file
|
||||||
Running: /home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb /home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.wdb
|
Running: /home/Luca/ISE/IEEE754Adder/AddSubTest_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb /home/Luca/ISE/IEEE754Adder/AddSubTest_isim_beh.wdb
|
||||||
ISim P.20160913 (signature 0xfbc00daa)
|
ISim P.20131013 (signature 0xfbc00daa)
|
||||||
----------------------------------------------------------------------
|
WARNING: A WEBPACK license was found.
|
||||||
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license.
|
||||||
|
WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version.
|
||||||
|
This is a Lite version of ISim.
|
||||||
----------------------------------------------------------------------
|
|
||||||
This is a Full version of ISim.
|
|
||||||
Time resolution is 1 ps
|
Time resolution is 1 ps
|
||||||
# onerror resume
|
# onerror resume
|
||||||
# wave add /
|
# wave add /
|
||||||
# run 1000 ns
|
# run 1000 ns
|
||||||
Simulator is doing circuit initialization process.
|
Simulator is doing circuit initialization process.
|
||||||
Finished circuit initialization process.
|
Finished circuit initialization process.
|
||||||
ISim P.20160913 (signature 0xfbc00daa)
|
|
||||||
----------------------------------------------------------------------
|
|
||||||
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
|
||||||
|
|
||||||
|
|
||||||
----------------------------------------------------------------------
|
|
||||||
This is a Full version of ISim.
|
|
||||||
# run 1000 ns
|
|
||||||
Simulator is doing circuit initialization process.
|
|
||||||
Finished circuit initialization process.
|
|
||||||
# exit 0
|
# exit 0
|
||||||
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
@@ -1,29 +0,0 @@
|
|||||||
Command line:
|
|
||||||
AdderTest_isim_beh.exe
|
|
||||||
-simmode gui
|
|
||||||
-simrunnum 0
|
|
||||||
-socket 37101
|
|
||||||
|
|
||||||
Sat Aug 24 17:55:24 2019
|
|
||||||
|
|
||||||
|
|
||||||
Elaboration Time: 0.02 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 195.351 Meg
|
|
||||||
|
|
||||||
Total Signals : 15
|
|
||||||
Total Nets : 59
|
|
||||||
Total Signal Drivers : 9
|
|
||||||
Total Blocks : 3
|
|
||||||
Total Primitive Blocks : 2
|
|
||||||
Total Processes : 9
|
|
||||||
Total Traceable Variables : 10
|
|
||||||
Total Scalar Nets and Variables : 421
|
|
||||||
Total Line Count : 14
|
|
||||||
|
|
||||||
Total Simulation Time: 0.03 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 272.949 Meg
|
|
||||||
|
|
||||||
Sat Aug 24 18:01:51 2019
|
|
||||||
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,40 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
#include "xsi.h"
|
|
||||||
|
|
||||||
struct XSI_INFO xsi_info;
|
|
||||||
|
|
||||||
char *IEEE_P_2592010699;
|
|
||||||
char *STD_STANDARD;
|
|
||||||
|
|
||||||
|
|
||||||
int main(int argc, char **argv)
|
|
||||||
{
|
|
||||||
xsi_init_design(argc, argv);
|
|
||||||
xsi_register_info(&xsi_info);
|
|
||||||
|
|
||||||
xsi_register_min_prec_unit(-12);
|
|
||||||
ieee_p_2592010699_init();
|
|
||||||
work_a_3841309559_2737618828_init();
|
|
||||||
work_a_4008929629_2372691052_init();
|
|
||||||
|
|
||||||
|
|
||||||
xsi_register_tops("work_a_4008929629_2372691052");
|
|
||||||
|
|
||||||
IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699");
|
|
||||||
xsi_register_ieee_std_logic_1164(IEEE_P_2592010699);
|
|
||||||
STD_STANDARD = xsi_get_engine_memory("std_standard");
|
|
||||||
|
|
||||||
return xsi_run_simulation(argc, argv);
|
|
||||||
|
|
||||||
}
|
|
||||||
Binary file not shown.
@@ -1,462 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/Luca/ISE/IEEE754Adder/Adder.vhd";
|
|
||||||
extern char *IEEE_P_2592010699;
|
|
||||||
|
|
||||||
char *ieee_p_2592010699_sub_16439767405979520975_503743352(char *, char *, char *, char *, char *, char *);
|
|
||||||
char *ieee_p_2592010699_sub_16439989832805790689_503743352(char *, char *, char *, char *, char *, char *);
|
|
||||||
char *ieee_p_2592010699_sub_16439989833707593767_503743352(char *, char *, char *, char *, char *, char *);
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768497506413324_503743352(char *, unsigned char , unsigned char );
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_3841309559_2737618828_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char t1[16];
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned int t8;
|
|
||||||
unsigned int t9;
|
|
||||||
unsigned char t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
char *t14;
|
|
||||||
char *t15;
|
|
||||||
char *t16;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(21, ng0);
|
|
||||||
|
|
||||||
LAB3: t2 = (t0 + 1032U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t2 = (t0 + 7680U);
|
|
||||||
t4 = (t0 + 1192U);
|
|
||||||
t5 = *((char **)t4);
|
|
||||||
t4 = (t0 + 7696U);
|
|
||||||
t6 = ieee_p_2592010699_sub_16439989832805790689_503743352(IEEE_P_2592010699, t1, t3, t2, t5, t4);
|
|
||||||
t7 = (t1 + 12U);
|
|
||||||
t8 = *((unsigned int *)t7);
|
|
||||||
t9 = (1U * t8);
|
|
||||||
t10 = (8U != t9);
|
|
||||||
if (t10 == 1)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t11 = (t0 + 5304);
|
|
||||||
t12 = (t11 + 56U);
|
|
||||||
t13 = *((char **)t12);
|
|
||||||
t14 = (t13 + 56U);
|
|
||||||
t15 = *((char **)t14);
|
|
||||||
memcpy(t15, t6, 8U);
|
|
||||||
xsi_driver_first_trans_fast(t11);
|
|
||||||
|
|
||||||
LAB2: t16 = (t0 + 5144);
|
|
||||||
*((int *)t16) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
LAB5: xsi_size_not_matching(8U, t9, 0);
|
|
||||||
goto LAB6;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_3841309559_2737618828_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char t1[16];
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned int t8;
|
|
||||||
unsigned int t9;
|
|
||||||
unsigned char t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
char *t14;
|
|
||||||
char *t15;
|
|
||||||
char *t16;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(22, ng0);
|
|
||||||
|
|
||||||
LAB3: t2 = (t0 + 1032U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t2 = (t0 + 7680U);
|
|
||||||
t4 = (t0 + 1192U);
|
|
||||||
t5 = *((char **)t4);
|
|
||||||
t4 = (t0 + 7696U);
|
|
||||||
t6 = ieee_p_2592010699_sub_16439767405979520975_503743352(IEEE_P_2592010699, t1, t3, t2, t5, t4);
|
|
||||||
t7 = (t1 + 12U);
|
|
||||||
t8 = *((unsigned int *)t7);
|
|
||||||
t9 = (1U * t8);
|
|
||||||
t10 = (8U != t9);
|
|
||||||
if (t10 == 1)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t11 = (t0 + 5368);
|
|
||||||
t12 = (t11 + 56U);
|
|
||||||
t13 = *((char **)t12);
|
|
||||||
t14 = (t13 + 56U);
|
|
||||||
t15 = *((char **)t14);
|
|
||||||
memcpy(t15, t6, 8U);
|
|
||||||
xsi_driver_first_trans_fast(t11);
|
|
||||||
|
|
||||||
LAB2: t16 = (t0 + 5160);
|
|
||||||
*((int *)t16) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
LAB5: xsi_size_not_matching(8U, t9, 0);
|
|
||||||
goto LAB6;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_3841309559_2737618828_p_2(char *t0)
|
|
||||||
{
|
|
||||||
char t1[16];
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned int t8;
|
|
||||||
unsigned int t9;
|
|
||||||
unsigned char t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
char *t14;
|
|
||||||
char *t15;
|
|
||||||
char *t16;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(23, ng0);
|
|
||||||
|
|
||||||
LAB3: t2 = (t0 + 1032U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t2 = (t0 + 7680U);
|
|
||||||
t4 = (t0 + 1192U);
|
|
||||||
t5 = *((char **)t4);
|
|
||||||
t4 = (t0 + 7696U);
|
|
||||||
t6 = ieee_p_2592010699_sub_16439989833707593767_503743352(IEEE_P_2592010699, t1, t3, t2, t5, t4);
|
|
||||||
t7 = (t1 + 12U);
|
|
||||||
t8 = *((unsigned int *)t7);
|
|
||||||
t9 = (1U * t8);
|
|
||||||
t10 = (8U != t9);
|
|
||||||
if (t10 == 1)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t11 = (t0 + 5432);
|
|
||||||
t12 = (t11 + 56U);
|
|
||||||
t13 = *((char **)t12);
|
|
||||||
t14 = (t13 + 56U);
|
|
||||||
t15 = *((char **)t14);
|
|
||||||
memcpy(t15, t6, 8U);
|
|
||||||
xsi_driver_first_trans_fast(t11);
|
|
||||||
|
|
||||||
LAB2: t16 = (t0 + 5176);
|
|
||||||
*((int *)t16) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
LAB5: xsi_size_not_matching(8U, t9, 0);
|
|
||||||
goto LAB6;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_3841309559_2737618828_p_3(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
int t8;
|
|
||||||
int t9;
|
|
||||||
int t10;
|
|
||||||
int t11;
|
|
||||||
int t12;
|
|
||||||
unsigned int t13;
|
|
||||||
unsigned int t14;
|
|
||||||
unsigned int t15;
|
|
||||||
char *t16;
|
|
||||||
int t17;
|
|
||||||
int t18;
|
|
||||||
unsigned int t19;
|
|
||||||
unsigned int t20;
|
|
||||||
unsigned int t21;
|
|
||||||
char *t22;
|
|
||||||
unsigned char t23;
|
|
||||||
char *t24;
|
|
||||||
char *t25;
|
|
||||||
int t26;
|
|
||||||
int t27;
|
|
||||||
int t28;
|
|
||||||
unsigned int t29;
|
|
||||||
unsigned int t30;
|
|
||||||
unsigned int t31;
|
|
||||||
char *t32;
|
|
||||||
unsigned char t33;
|
|
||||||
unsigned char t34;
|
|
||||||
unsigned char t35;
|
|
||||||
char *t36;
|
|
||||||
int t37;
|
|
||||||
int t38;
|
|
||||||
unsigned int t39;
|
|
||||||
unsigned int t40;
|
|
||||||
unsigned int t41;
|
|
||||||
char *t42;
|
|
||||||
char *t43;
|
|
||||||
char *t44;
|
|
||||||
char *t45;
|
|
||||||
char *t46;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(27, ng0);
|
|
||||||
t1 = (t0 + 1352U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 5496);
|
|
||||||
t4 = (t1 + 56U);
|
|
||||||
t5 = *((char **)t4);
|
|
||||||
t6 = (t5 + 56U);
|
|
||||||
t7 = *((char **)t6);
|
|
||||||
*((unsigned char *)t7) = t3;
|
|
||||||
xsi_driver_first_trans_delta(t1, 7U, 1, 0LL);
|
|
||||||
xsi_set_current_line(28, ng0);
|
|
||||||
t8 = (8 - 1);
|
|
||||||
t1 = (t0 + 7853);
|
|
||||||
*((int *)t1) = t8;
|
|
||||||
t2 = (t0 + 7857);
|
|
||||||
*((int *)t2) = 1;
|
|
||||||
t9 = t8;
|
|
||||||
t10 = 1;
|
|
||||||
|
|
||||||
LAB2: if (t9 >= t10)
|
|
||||||
goto LAB3;
|
|
||||||
|
|
||||||
LAB5: t1 = (t0 + 5192);
|
|
||||||
*((int *)t1) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB3: xsi_set_current_line(29, ng0);
|
|
||||||
t4 = (t0 + 1832U);
|
|
||||||
t5 = *((char **)t4);
|
|
||||||
t4 = (t0 + 7853);
|
|
||||||
t11 = *((int *)t4);
|
|
||||||
t12 = (t11 - 7);
|
|
||||||
t13 = (t12 * -1);
|
|
||||||
xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t4));
|
|
||||||
t14 = (1U * t13);
|
|
||||||
t15 = (0 + t14);
|
|
||||||
t6 = (t5 + t15);
|
|
||||||
t3 = *((unsigned char *)t6);
|
|
||||||
t7 = (t0 + 1992U);
|
|
||||||
t16 = *((char **)t7);
|
|
||||||
t7 = (t0 + 7853);
|
|
||||||
t17 = *((int *)t7);
|
|
||||||
t18 = (t17 - 7);
|
|
||||||
t19 = (t18 * -1);
|
|
||||||
xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t7));
|
|
||||||
t20 = (1U * t19);
|
|
||||||
t21 = (0 + t20);
|
|
||||||
t22 = (t16 + t21);
|
|
||||||
t23 = *((unsigned char *)t22);
|
|
||||||
t24 = (t0 + 2152U);
|
|
||||||
t25 = *((char **)t24);
|
|
||||||
t24 = (t0 + 7853);
|
|
||||||
t26 = *((int *)t24);
|
|
||||||
t27 = (t26 - 1);
|
|
||||||
t28 = (t27 - 7);
|
|
||||||
t29 = (t28 * -1);
|
|
||||||
xsi_vhdl_check_range_of_index(7, 0, -1, t27);
|
|
||||||
t30 = (1U * t29);
|
|
||||||
t31 = (0 + t30);
|
|
||||||
t32 = (t25 + t31);
|
|
||||||
t33 = *((unsigned char *)t32);
|
|
||||||
t34 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t23, t33);
|
|
||||||
t35 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t3, t34);
|
|
||||||
t36 = (t0 + 7853);
|
|
||||||
t37 = *((int *)t36);
|
|
||||||
t38 = (t37 - 7);
|
|
||||||
t39 = (t38 * -1);
|
|
||||||
t40 = (1 * t39);
|
|
||||||
t41 = (0U + t40);
|
|
||||||
t42 = (t0 + 5496);
|
|
||||||
t43 = (t42 + 56U);
|
|
||||||
t44 = *((char **)t43);
|
|
||||||
t45 = (t44 + 56U);
|
|
||||||
t46 = *((char **)t45);
|
|
||||||
*((unsigned char *)t46) = t35;
|
|
||||||
xsi_driver_first_trans_delta(t42, t41, 1, 0LL);
|
|
||||||
|
|
||||||
LAB4: t1 = (t0 + 7853);
|
|
||||||
t9 = *((int *)t1);
|
|
||||||
t2 = (t0 + 7857);
|
|
||||||
t10 = *((int *)t2);
|
|
||||||
if (t9 == t10)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t8 = (t9 + -1);
|
|
||||||
t9 = t8;
|
|
||||||
t4 = (t0 + 7853);
|
|
||||||
*((int *)t4) = t9;
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_3841309559_2737618828_p_4(char *t0)
|
|
||||||
{
|
|
||||||
char t1[16];
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned int t8;
|
|
||||||
unsigned int t9;
|
|
||||||
unsigned char t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
char *t14;
|
|
||||||
char *t15;
|
|
||||||
char *t16;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(33, ng0);
|
|
||||||
|
|
||||||
LAB3: t2 = (t0 + 2312U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t2 = (t0 + 7776U);
|
|
||||||
t4 = (t0 + 2152U);
|
|
||||||
t5 = *((char **)t4);
|
|
||||||
t4 = (t0 + 7760U);
|
|
||||||
t6 = ieee_p_2592010699_sub_16439989833707593767_503743352(IEEE_P_2592010699, t1, t3, t2, t5, t4);
|
|
||||||
t7 = (t1 + 12U);
|
|
||||||
t8 = *((unsigned int *)t7);
|
|
||||||
t9 = (1U * t8);
|
|
||||||
t10 = (8U != t9);
|
|
||||||
if (t10 == 1)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t11 = (t0 + 5560);
|
|
||||||
t12 = (t11 + 56U);
|
|
||||||
t13 = *((char **)t12);
|
|
||||||
t14 = (t13 + 56U);
|
|
||||||
t15 = *((char **)t14);
|
|
||||||
memcpy(t15, t6, 8U);
|
|
||||||
xsi_driver_first_trans_fast_port(t11);
|
|
||||||
|
|
||||||
LAB2: t16 = (t0 + 5208);
|
|
||||||
*((int *)t16) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
LAB5: xsi_size_not_matching(8U, t9, 0);
|
|
||||||
goto LAB6;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_3841309559_2737618828_p_5(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
unsigned int t6;
|
|
||||||
unsigned int t7;
|
|
||||||
unsigned char t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
int t11;
|
|
||||||
int t12;
|
|
||||||
unsigned int t13;
|
|
||||||
unsigned int t14;
|
|
||||||
unsigned int t15;
|
|
||||||
unsigned char t16;
|
|
||||||
unsigned char t17;
|
|
||||||
char *t18;
|
|
||||||
char *t19;
|
|
||||||
char *t20;
|
|
||||||
char *t21;
|
|
||||||
char *t22;
|
|
||||||
char *t23;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(34, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 2312U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (8 - 1);
|
|
||||||
t4 = (t3 - 7);
|
|
||||||
t5 = (t4 * -1);
|
|
||||||
t6 = (1U * t5);
|
|
||||||
t7 = (0 + t6);
|
|
||||||
t1 = (t2 + t7);
|
|
||||||
t8 = *((unsigned char *)t1);
|
|
||||||
t9 = (t0 + 2152U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
t11 = (8 - 1);
|
|
||||||
t12 = (t11 - 7);
|
|
||||||
t13 = (t12 * -1);
|
|
||||||
t14 = (1U * t13);
|
|
||||||
t15 = (0 + t14);
|
|
||||||
t9 = (t10 + t15);
|
|
||||||
t16 = *((unsigned char *)t9);
|
|
||||||
t17 = ieee_p_2592010699_sub_3488768497506413324_503743352(IEEE_P_2592010699, t8, t16);
|
|
||||||
t18 = (t0 + 5624);
|
|
||||||
t19 = (t18 + 56U);
|
|
||||||
t20 = *((char **)t19);
|
|
||||||
t21 = (t20 + 56U);
|
|
||||||
t22 = *((char **)t21);
|
|
||||||
*((unsigned char *)t22) = t17;
|
|
||||||
xsi_driver_first_trans_fast_port(t18);
|
|
||||||
|
|
||||||
LAB2: t23 = (t0 + 5224);
|
|
||||||
*((int *)t23) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_3841309559_2737618828_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_3841309559_2737618828_p_0,(void *)work_a_3841309559_2737618828_p_1,(void *)work_a_3841309559_2737618828_p_2,(void *)work_a_3841309559_2737618828_p_3,(void *)work_a_3841309559_2737618828_p_4,(void *)work_a_3841309559_2737618828_p_5};
|
|
||||||
xsi_register_didat("work_a_3841309559_2737618828", "isim/AdderTest_isim_beh.exe.sim/work/a_3841309559_2737618828.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,154 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/Luca/ISE/IEEE754Adder/AdderTest.vhd";
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_4008929629_2372691052_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
int64 t7;
|
|
||||||
int64 t8;
|
|
||||||
|
|
||||||
LAB0: t1 = (t0 + 3104U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
if (t2 == 0)
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
LAB3: goto *t2;
|
|
||||||
|
|
||||||
LAB2: xsi_set_current_line(81, ng0);
|
|
||||||
t2 = (t0 + 3984);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(82, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t8 = (t7 / 2);
|
|
||||||
t2 = (t0 + 2912);
|
|
||||||
xsi_process_wait(t2, t8);
|
|
||||||
|
|
||||||
LAB6: *((char **)t1) = &&LAB7;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: xsi_set_current_line(83, ng0);
|
|
||||||
t2 = (t0 + 3984);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(84, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t8 = (t7 / 2);
|
|
||||||
t2 = (t0 + 2912);
|
|
||||||
xsi_process_wait(t2, t8);
|
|
||||||
|
|
||||||
LAB10: *((char **)t1) = &&LAB11;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB5: goto LAB4;
|
|
||||||
|
|
||||||
LAB7: goto LAB5;
|
|
||||||
|
|
||||||
LAB8: goto LAB2;
|
|
||||||
|
|
||||||
LAB9: goto LAB8;
|
|
||||||
|
|
||||||
LAB11: goto LAB9;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_4008929629_2372691052_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(87, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 6136);
|
|
||||||
t3 = (t0 + 4048);
|
|
||||||
t4 = (t3 + 56U);
|
|
||||||
t5 = *((char **)t4);
|
|
||||||
t6 = (t5 + 56U);
|
|
||||||
t7 = *((char **)t6);
|
|
||||||
memcpy(t7, t1, 8U);
|
|
||||||
xsi_driver_first_trans_fast(t3);
|
|
||||||
|
|
||||||
LAB2:
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_4008929629_2372691052_p_2(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(88, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 6144);
|
|
||||||
t3 = (t0 + 4112);
|
|
||||||
t4 = (t3 + 56U);
|
|
||||||
t5 = *((char **)t4);
|
|
||||||
t6 = (t5 + 56U);
|
|
||||||
t7 = *((char **)t6);
|
|
||||||
memcpy(t7, t1, 8U);
|
|
||||||
xsi_driver_first_trans_fast(t3);
|
|
||||||
|
|
||||||
LAB2:
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_4008929629_2372691052_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_4008929629_2372691052_p_0,(void *)work_a_4008929629_2372691052_p_1,(void *)work_a_4008929629_2372691052_p_2};
|
|
||||||
xsi_register_didat("work_a_4008929629_2372691052", "isim/AdderTest_isim_beh.exe.sim/work/a_4008929629_2372691052.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
@@ -1,28 +0,0 @@
|
|||||||
Command line:
|
|
||||||
ComparatorTest_isim_beh.exe
|
|
||||||
-simmode gui
|
|
||||||
-simrunnum 0
|
|
||||||
-socket 40809
|
|
||||||
|
|
||||||
Tue Aug 27 09:47:36 2019
|
|
||||||
|
|
||||||
|
|
||||||
Elaboration Time: 0.12 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 198.607 Meg
|
|
||||||
|
|
||||||
Total Signals : 9
|
|
||||||
Total Nets : 34
|
|
||||||
Total Signal Drivers : 4
|
|
||||||
Total Blocks : 3
|
|
||||||
Total Primitive Blocks : 2
|
|
||||||
Total Processes : 5
|
|
||||||
Total Traceable Variables : 10
|
|
||||||
Total Scalar Nets and Variables : 396
|
|
||||||
|
|
||||||
Total Simulation Time: 0.13 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 276.206 Meg
|
|
||||||
|
|
||||||
Tue Aug 27 09:47:41 2019
|
|
||||||
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,40 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
#include "xsi.h"
|
|
||||||
|
|
||||||
struct XSI_INFO xsi_info;
|
|
||||||
|
|
||||||
char *IEEE_P_2592010699;
|
|
||||||
char *STD_STANDARD;
|
|
||||||
|
|
||||||
|
|
||||||
int main(int argc, char **argv)
|
|
||||||
{
|
|
||||||
xsi_init_design(argc, argv);
|
|
||||||
xsi_register_info(&xsi_info);
|
|
||||||
|
|
||||||
xsi_register_min_prec_unit(-12);
|
|
||||||
ieee_p_2592010699_init();
|
|
||||||
work_a_0883098610_0495709306_init();
|
|
||||||
work_a_1038528572_2372691052_init();
|
|
||||||
|
|
||||||
|
|
||||||
xsi_register_tops("work_a_1038528572_2372691052");
|
|
||||||
|
|
||||||
IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699");
|
|
||||||
xsi_register_ieee_std_logic_1164(IEEE_P_2592010699);
|
|
||||||
STD_STANDARD = xsi_get_engine_memory("std_standard");
|
|
||||||
|
|
||||||
return xsi_run_simulation(argc, argv);
|
|
||||||
|
|
||||||
}
|
|
||||||
Binary file not shown.
@@ -1,314 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/ise/gianni/IEEE754Adder/Comparator.vhd";
|
|
||||||
extern char *IEEE_P_2592010699;
|
|
||||||
|
|
||||||
char *ieee_p_2592010699_sub_16439989832805790689_503743352(char *, char *, char *, char *, char *, char *);
|
|
||||||
char *ieee_p_2592010699_sub_207919886985903570_503743352(char *, char *, char *, char *);
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char );
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_0883098610_0495709306_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char t1[16];
|
|
||||||
char t4[16];
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
unsigned int t10;
|
|
||||||
unsigned int t11;
|
|
||||||
unsigned char t12;
|
|
||||||
char *t13;
|
|
||||||
char *t14;
|
|
||||||
char *t15;
|
|
||||||
char *t16;
|
|
||||||
char *t17;
|
|
||||||
char *t18;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(17, ng0);
|
|
||||||
|
|
||||||
LAB3: t2 = (t0 + 1032U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t2 = (t0 + 6144U);
|
|
||||||
t5 = (t0 + 1192U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t5 = (t0 + 6160U);
|
|
||||||
t7 = ieee_p_2592010699_sub_207919886985903570_503743352(IEEE_P_2592010699, t4, t6, t5);
|
|
||||||
t8 = ieee_p_2592010699_sub_16439989832805790689_503743352(IEEE_P_2592010699, t1, t3, t2, t7, t4);
|
|
||||||
t9 = (t1 + 12U);
|
|
||||||
t10 = *((unsigned int *)t9);
|
|
||||||
t11 = (1U * t10);
|
|
||||||
t12 = (8U != t11);
|
|
||||||
if (t12 == 1)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t13 = (t0 + 4112);
|
|
||||||
t14 = (t13 + 56U);
|
|
||||||
t15 = *((char **)t14);
|
|
||||||
t16 = (t15 + 56U);
|
|
||||||
t17 = *((char **)t16);
|
|
||||||
memcpy(t17, t8, 8U);
|
|
||||||
xsi_driver_first_trans_fast(t13);
|
|
||||||
|
|
||||||
LAB2: t18 = (t0 + 4000);
|
|
||||||
*((int *)t18) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
LAB5: xsi_size_not_matching(8U, t11, 0);
|
|
||||||
goto LAB6;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0883098610_0495709306_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char t1[16];
|
|
||||||
char t2[16];
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
unsigned int t10;
|
|
||||||
unsigned int t11;
|
|
||||||
unsigned char t12;
|
|
||||||
char *t13;
|
|
||||||
char *t14;
|
|
||||||
char *t15;
|
|
||||||
char *t16;
|
|
||||||
char *t17;
|
|
||||||
char *t18;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(18, ng0);
|
|
||||||
|
|
||||||
LAB3: t3 = (t0 + 1032U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t3 = (t0 + 6144U);
|
|
||||||
t5 = ieee_p_2592010699_sub_207919886985903570_503743352(IEEE_P_2592010699, t2, t4, t3);
|
|
||||||
t6 = (t0 + 1192U);
|
|
||||||
t7 = *((char **)t6);
|
|
||||||
t6 = (t0 + 6160U);
|
|
||||||
t8 = ieee_p_2592010699_sub_16439989832805790689_503743352(IEEE_P_2592010699, t1, t5, t2, t7, t6);
|
|
||||||
t9 = (t1 + 12U);
|
|
||||||
t10 = *((unsigned int *)t9);
|
|
||||||
t11 = (1U * t10);
|
|
||||||
t12 = (8U != t11);
|
|
||||||
if (t12 == 1)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t13 = (t0 + 4176);
|
|
||||||
t14 = (t13 + 56U);
|
|
||||||
t15 = *((char **)t14);
|
|
||||||
t16 = (t15 + 56U);
|
|
||||||
t17 = *((char **)t16);
|
|
||||||
memcpy(t17, t8, 8U);
|
|
||||||
xsi_driver_first_trans_fast(t13);
|
|
||||||
|
|
||||||
LAB2: t18 = (t0 + 4016);
|
|
||||||
*((int *)t18) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
LAB5: xsi_size_not_matching(8U, t11, 0);
|
|
||||||
goto LAB6;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0883098610_0495709306_p_2(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
int t4;
|
|
||||||
int t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned char t8;
|
|
||||||
char *t9;
|
|
||||||
int t10;
|
|
||||||
int t11;
|
|
||||||
unsigned int t12;
|
|
||||||
unsigned int t13;
|
|
||||||
unsigned int t14;
|
|
||||||
char *t15;
|
|
||||||
unsigned char t16;
|
|
||||||
unsigned char t17;
|
|
||||||
char *t18;
|
|
||||||
char *t19;
|
|
||||||
int t20;
|
|
||||||
int t21;
|
|
||||||
unsigned int t22;
|
|
||||||
unsigned int t23;
|
|
||||||
unsigned int t24;
|
|
||||||
char *t25;
|
|
||||||
unsigned char t26;
|
|
||||||
unsigned char t27;
|
|
||||||
char *t28;
|
|
||||||
char *t29;
|
|
||||||
unsigned char t30;
|
|
||||||
unsigned char t31;
|
|
||||||
unsigned char t32;
|
|
||||||
char *t33;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(24, ng0);
|
|
||||||
t1 = (t0 + 2088U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t1 = (t2 + 0);
|
|
||||||
*((unsigned char *)t1) = (unsigned char)2;
|
|
||||||
xsi_set_current_line(25, ng0);
|
|
||||||
t1 = (t0 + 2208U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t1 = (t2 + 0);
|
|
||||||
*((unsigned char *)t1) = (unsigned char)3;
|
|
||||||
xsi_set_current_line(26, ng0);
|
|
||||||
t3 = (8 - 1);
|
|
||||||
t1 = (t0 + 6254);
|
|
||||||
*((int *)t1) = t3;
|
|
||||||
t2 = (t0 + 6258);
|
|
||||||
*((int *)t2) = 0;
|
|
||||||
t4 = t3;
|
|
||||||
t5 = 0;
|
|
||||||
|
|
||||||
LAB2: if (t4 >= t5)
|
|
||||||
goto LAB3;
|
|
||||||
|
|
||||||
LAB5: xsi_set_current_line(30, ng0);
|
|
||||||
t1 = (t0 + 2088U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t8 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 4240);
|
|
||||||
t6 = (t1 + 56U);
|
|
||||||
t7 = *((char **)t6);
|
|
||||||
t9 = (t7 + 56U);
|
|
||||||
t15 = *((char **)t9);
|
|
||||||
*((unsigned char *)t15) = t8;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
t1 = (t0 + 4032);
|
|
||||||
*((int *)t1) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB3: xsi_set_current_line(27, ng0);
|
|
||||||
t6 = (t0 + 2088U);
|
|
||||||
t7 = *((char **)t6);
|
|
||||||
t8 = *((unsigned char *)t7);
|
|
||||||
t6 = (t0 + 1512U);
|
|
||||||
t9 = *((char **)t6);
|
|
||||||
t6 = (t0 + 6254);
|
|
||||||
t10 = *((int *)t6);
|
|
||||||
t11 = (t10 - 7);
|
|
||||||
t12 = (t11 * -1);
|
|
||||||
xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t6));
|
|
||||||
t13 = (1U * t12);
|
|
||||||
t14 = (0 + t13);
|
|
||||||
t15 = (t9 + t14);
|
|
||||||
t16 = *((unsigned char *)t15);
|
|
||||||
t17 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t16);
|
|
||||||
t18 = (t0 + 1672U);
|
|
||||||
t19 = *((char **)t18);
|
|
||||||
t18 = (t0 + 6254);
|
|
||||||
t20 = *((int *)t18);
|
|
||||||
t21 = (t20 - 7);
|
|
||||||
t22 = (t21 * -1);
|
|
||||||
xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t18));
|
|
||||||
t23 = (1U * t22);
|
|
||||||
t24 = (0 + t23);
|
|
||||||
t25 = (t19 + t24);
|
|
||||||
t26 = *((unsigned char *)t25);
|
|
||||||
t27 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t17, t26);
|
|
||||||
t28 = (t0 + 2208U);
|
|
||||||
t29 = *((char **)t28);
|
|
||||||
t30 = *((unsigned char *)t29);
|
|
||||||
t31 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t27, t30);
|
|
||||||
t32 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t8, t31);
|
|
||||||
t28 = (t0 + 2088U);
|
|
||||||
t33 = *((char **)t28);
|
|
||||||
t28 = (t33 + 0);
|
|
||||||
*((unsigned char *)t28) = t32;
|
|
||||||
xsi_set_current_line(28, ng0);
|
|
||||||
t1 = (t0 + 2208U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t8 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1512U);
|
|
||||||
t6 = *((char **)t1);
|
|
||||||
t1 = (t0 + 6254);
|
|
||||||
t3 = *((int *)t1);
|
|
||||||
t10 = (t3 - 7);
|
|
||||||
t12 = (t10 * -1);
|
|
||||||
xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t1));
|
|
||||||
t13 = (1U * t12);
|
|
||||||
t14 = (0 + t13);
|
|
||||||
t7 = (t6 + t14);
|
|
||||||
t16 = *((unsigned char *)t7);
|
|
||||||
t9 = (t0 + 1672U);
|
|
||||||
t15 = *((char **)t9);
|
|
||||||
t9 = (t0 + 6254);
|
|
||||||
t11 = *((int *)t9);
|
|
||||||
t20 = (t11 - 7);
|
|
||||||
t22 = (t20 * -1);
|
|
||||||
xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t9));
|
|
||||||
t23 = (1U * t22);
|
|
||||||
t24 = (0 + t23);
|
|
||||||
t18 = (t15 + t24);
|
|
||||||
t17 = *((unsigned char *)t18);
|
|
||||||
t26 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t17);
|
|
||||||
t27 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t16, t26);
|
|
||||||
t30 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t27);
|
|
||||||
t31 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t8, t30);
|
|
||||||
t19 = (t0 + 2208U);
|
|
||||||
t25 = *((char **)t19);
|
|
||||||
t19 = (t25 + 0);
|
|
||||||
*((unsigned char *)t19) = t31;
|
|
||||||
|
|
||||||
LAB4: t1 = (t0 + 6254);
|
|
||||||
t4 = *((int *)t1);
|
|
||||||
t2 = (t0 + 6258);
|
|
||||||
t5 = *((int *)t2);
|
|
||||||
if (t4 == t5)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t3 = (t4 + -1);
|
|
||||||
t4 = t3;
|
|
||||||
t6 = (t0 + 6254);
|
|
||||||
*((int *)t6) = t4;
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_0883098610_0495709306_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_0883098610_0495709306_p_0,(void *)work_a_0883098610_0495709306_p_1,(void *)work_a_0883098610_0495709306_p_2};
|
|
||||||
xsi_register_didat("work_a_0883098610_0495709306", "isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,157 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/ise/gianni/IEEE754Adder/ComparatorTest.vhd";
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_1038528572_2372691052_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
int64 t7;
|
|
||||||
int64 t8;
|
|
||||||
|
|
||||||
LAB0: t1 = (t0 + 2784U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
if (t2 == 0)
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
LAB3: goto *t2;
|
|
||||||
|
|
||||||
LAB2: xsi_set_current_line(45, ng0);
|
|
||||||
t2 = (t0 + 3416);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(46, ng0);
|
|
||||||
t2 = (t0 + 1808U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t8 = (t7 / 2);
|
|
||||||
t2 = (t0 + 2592);
|
|
||||||
xsi_process_wait(t2, t8);
|
|
||||||
|
|
||||||
LAB6: *((char **)t1) = &&LAB7;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: xsi_set_current_line(47, ng0);
|
|
||||||
t2 = (t0 + 3416);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(48, ng0);
|
|
||||||
t2 = (t0 + 1808U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t8 = (t7 / 2);
|
|
||||||
t2 = (t0 + 2592);
|
|
||||||
xsi_process_wait(t2, t8);
|
|
||||||
|
|
||||||
LAB10: *((char **)t1) = &&LAB11;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB5: goto LAB4;
|
|
||||||
|
|
||||||
LAB7: goto LAB5;
|
|
||||||
|
|
||||||
LAB8: goto LAB2;
|
|
||||||
|
|
||||||
LAB9: goto LAB8;
|
|
||||||
|
|
||||||
LAB11: goto LAB9;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_1038528572_2372691052_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int64 t3;
|
|
||||||
char *t4;
|
|
||||||
int64 t5;
|
|
||||||
|
|
||||||
LAB0: t1 = (t0 + 3032U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
if (t2 == 0)
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
LAB3: goto *t2;
|
|
||||||
|
|
||||||
LAB2: xsi_set_current_line(56, ng0);
|
|
||||||
t3 = (100 * 1000LL);
|
|
||||||
t2 = (t0 + 2840);
|
|
||||||
xsi_process_wait(t2, t3);
|
|
||||||
|
|
||||||
LAB6: *((char **)t1) = &&LAB7;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: xsi_set_current_line(58, ng0);
|
|
||||||
t2 = (t0 + 1808U);
|
|
||||||
t4 = *((char **)t2);
|
|
||||||
t3 = *((int64 *)t4);
|
|
||||||
t5 = (t3 * 10);
|
|
||||||
t2 = (t0 + 2840);
|
|
||||||
xsi_process_wait(t2, t5);
|
|
||||||
|
|
||||||
LAB10: *((char **)t1) = &&LAB11;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB5: goto LAB4;
|
|
||||||
|
|
||||||
LAB7: goto LAB5;
|
|
||||||
|
|
||||||
LAB8: xsi_set_current_line(62, ng0);
|
|
||||||
|
|
||||||
LAB14: *((char **)t1) = &&LAB15;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB9: goto LAB8;
|
|
||||||
|
|
||||||
LAB11: goto LAB9;
|
|
||||||
|
|
||||||
LAB12: goto LAB2;
|
|
||||||
|
|
||||||
LAB13: goto LAB12;
|
|
||||||
|
|
||||||
LAB15: goto LAB13;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_1038528572_2372691052_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_1038528572_2372691052_p_0,(void *)work_a_1038528572_2372691052_p_1};
|
|
||||||
xsi_register_didat("work_a_1038528572_2372691052", "isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
@@ -1,28 +0,0 @@
|
|||||||
Command line:
|
|
||||||
FullAdderTest_isim_beh.exe
|
|
||||||
-simmode gui
|
|
||||||
-simrunnum 0
|
|
||||||
-socket 51967
|
|
||||||
|
|
||||||
Tue Aug 27 15:05:31 2019
|
|
||||||
|
|
||||||
|
|
||||||
Elaboration Time: 0.11 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 198.607 Meg
|
|
||||||
|
|
||||||
Total Signals : 11
|
|
||||||
Total Nets : 6
|
|
||||||
Total Signal Drivers : 6
|
|
||||||
Total Blocks : 3
|
|
||||||
Total Primitive Blocks : 2
|
|
||||||
Total Processes : 4
|
|
||||||
Total Traceable Variables : 9
|
|
||||||
Total Scalar Nets and Variables : 367
|
|
||||||
|
|
||||||
Total Simulation Time: 0.15 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 276.206 Meg
|
|
||||||
|
|
||||||
Tue Aug 27 15:08:11 2019
|
|
||||||
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,40 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
#include "xsi.h"
|
|
||||||
|
|
||||||
struct XSI_INFO xsi_info;
|
|
||||||
|
|
||||||
char *IEEE_P_2592010699;
|
|
||||||
char *STD_STANDARD;
|
|
||||||
|
|
||||||
|
|
||||||
int main(int argc, char **argv)
|
|
||||||
{
|
|
||||||
xsi_init_design(argc, argv);
|
|
||||||
xsi_register_info(&xsi_info);
|
|
||||||
|
|
||||||
xsi_register_min_prec_unit(-12);
|
|
||||||
ieee_p_2592010699_init();
|
|
||||||
work_a_1130988942_2801528920_init();
|
|
||||||
work_a_2258021406_2372691052_init();
|
|
||||||
|
|
||||||
|
|
||||||
xsi_register_tops("work_a_2258021406_2372691052");
|
|
||||||
|
|
||||||
IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699");
|
|
||||||
xsi_register_ieee_std_logic_1164(IEEE_P_2592010699);
|
|
||||||
STD_STANDARD = xsi_get_engine_memory("std_standard");
|
|
||||||
|
|
||||||
return xsi_run_simulation(argc, argv);
|
|
||||||
|
|
||||||
}
|
|
||||||
Binary file not shown.
@@ -1,151 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/ise/gianni/IEEE754Adder/FullAdder.vhd";
|
|
||||||
extern char *IEEE_P_2592010699;
|
|
||||||
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768497506413324_503743352(char *, unsigned char , unsigned char );
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_1130988942_2801528920_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
unsigned char t5;
|
|
||||||
unsigned char t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned char t8;
|
|
||||||
unsigned char t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
char *t14;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(14, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1352U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1032U);
|
|
||||||
t4 = *((char **)t1);
|
|
||||||
t5 = *((unsigned char *)t4);
|
|
||||||
t6 = ieee_p_2592010699_sub_3488768497506413324_503743352(IEEE_P_2592010699, t3, t5);
|
|
||||||
t1 = (t0 + 1192U);
|
|
||||||
t7 = *((char **)t1);
|
|
||||||
t8 = *((unsigned char *)t7);
|
|
||||||
t9 = ieee_p_2592010699_sub_3488768497506413324_503743352(IEEE_P_2592010699, t6, t8);
|
|
||||||
t1 = (t0 + 3488);
|
|
||||||
t10 = (t1 + 56U);
|
|
||||||
t11 = *((char **)t10);
|
|
||||||
t12 = (t11 + 56U);
|
|
||||||
t13 = *((char **)t12);
|
|
||||||
*((unsigned char *)t13) = t9;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
|
|
||||||
LAB2: t14 = (t0 + 3392);
|
|
||||||
*((int *)t14) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_1130988942_2801528920_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
unsigned char t5;
|
|
||||||
unsigned char t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned char t8;
|
|
||||||
char *t9;
|
|
||||||
unsigned char t10;
|
|
||||||
unsigned char t11;
|
|
||||||
unsigned char t12;
|
|
||||||
char *t13;
|
|
||||||
unsigned char t14;
|
|
||||||
char *t15;
|
|
||||||
unsigned char t16;
|
|
||||||
unsigned char t17;
|
|
||||||
unsigned char t18;
|
|
||||||
char *t19;
|
|
||||||
char *t20;
|
|
||||||
char *t21;
|
|
||||||
char *t22;
|
|
||||||
char *t23;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(15, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1352U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1032U);
|
|
||||||
t4 = *((char **)t1);
|
|
||||||
t5 = *((unsigned char *)t4);
|
|
||||||
t6 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t3, t5);
|
|
||||||
t1 = (t0 + 1352U);
|
|
||||||
t7 = *((char **)t1);
|
|
||||||
t8 = *((unsigned char *)t7);
|
|
||||||
t1 = (t0 + 1192U);
|
|
||||||
t9 = *((char **)t1);
|
|
||||||
t10 = *((unsigned char *)t9);
|
|
||||||
t11 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t8, t10);
|
|
||||||
t12 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t6, t11);
|
|
||||||
t1 = (t0 + 1032U);
|
|
||||||
t13 = *((char **)t1);
|
|
||||||
t14 = *((unsigned char *)t13);
|
|
||||||
t1 = (t0 + 1192U);
|
|
||||||
t15 = *((char **)t1);
|
|
||||||
t16 = *((unsigned char *)t15);
|
|
||||||
t17 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t14, t16);
|
|
||||||
t18 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t12, t17);
|
|
||||||
t1 = (t0 + 3552);
|
|
||||||
t19 = (t1 + 56U);
|
|
||||||
t20 = *((char **)t19);
|
|
||||||
t21 = (t20 + 56U);
|
|
||||||
t22 = *((char **)t21);
|
|
||||||
*((unsigned char *)t22) = t18;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
|
|
||||||
LAB2: t23 = (t0 + 3408);
|
|
||||||
*((int *)t23) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_1130988942_2801528920_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_1130988942_2801528920_p_0,(void *)work_a_1130988942_2801528920_p_1};
|
|
||||||
xsi_register_didat("work_a_1130988942_2801528920", "isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,427 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/ise/gianni/IEEE754Adder/FullAdderTest.vhd";
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_2258021406_2372691052_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
int64 t7;
|
|
||||||
int64 t8;
|
|
||||||
|
|
||||||
LAB0: t1 = (t0 + 3104U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
if (t2 == 0)
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
LAB3: goto *t2;
|
|
||||||
|
|
||||||
LAB2: xsi_set_current_line(54, ng0);
|
|
||||||
t2 = (t0 + 3736);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(55, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t8 = (t7 / 2);
|
|
||||||
t2 = (t0 + 2912);
|
|
||||||
xsi_process_wait(t2, t8);
|
|
||||||
|
|
||||||
LAB6: *((char **)t1) = &&LAB7;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: xsi_set_current_line(56, ng0);
|
|
||||||
t2 = (t0 + 3736);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(57, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t8 = (t7 / 2);
|
|
||||||
t2 = (t0 + 2912);
|
|
||||||
xsi_process_wait(t2, t8);
|
|
||||||
|
|
||||||
LAB10: *((char **)t1) = &&LAB11;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB5: goto LAB4;
|
|
||||||
|
|
||||||
LAB7: goto LAB5;
|
|
||||||
|
|
||||||
LAB8: goto LAB2;
|
|
||||||
|
|
||||||
LAB9: goto LAB8;
|
|
||||||
|
|
||||||
LAB11: goto LAB9;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_2258021406_2372691052_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
int64 t7;
|
|
||||||
|
|
||||||
LAB0: t1 = (t0 + 3352U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
if (t2 == 0)
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
LAB3: goto *t2;
|
|
||||||
|
|
||||||
LAB2: xsi_set_current_line(63, ng0);
|
|
||||||
t2 = (t0 + 3800);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(64, ng0);
|
|
||||||
t2 = (t0 + 3864);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(65, ng0);
|
|
||||||
t2 = (t0 + 3928);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(66, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t2 = (t0 + 3160);
|
|
||||||
xsi_process_wait(t2, t7);
|
|
||||||
|
|
||||||
LAB6: *((char **)t1) = &&LAB7;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: xsi_set_current_line(67, ng0);
|
|
||||||
t2 = (t0 + 3800);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(68, ng0);
|
|
||||||
t2 = (t0 + 3864);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(69, ng0);
|
|
||||||
t2 = (t0 + 3928);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(70, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t2 = (t0 + 3160);
|
|
||||||
xsi_process_wait(t2, t7);
|
|
||||||
|
|
||||||
LAB10: *((char **)t1) = &&LAB11;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB5: goto LAB4;
|
|
||||||
|
|
||||||
LAB7: goto LAB5;
|
|
||||||
|
|
||||||
LAB8: xsi_set_current_line(71, ng0);
|
|
||||||
t2 = (t0 + 3800);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(72, ng0);
|
|
||||||
t2 = (t0 + 3864);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(73, ng0);
|
|
||||||
t2 = (t0 + 3928);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(74, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t2 = (t0 + 3160);
|
|
||||||
xsi_process_wait(t2, t7);
|
|
||||||
|
|
||||||
LAB14: *((char **)t1) = &&LAB15;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB9: goto LAB8;
|
|
||||||
|
|
||||||
LAB11: goto LAB9;
|
|
||||||
|
|
||||||
LAB12: xsi_set_current_line(75, ng0);
|
|
||||||
t2 = (t0 + 3800);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(76, ng0);
|
|
||||||
t2 = (t0 + 3864);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(77, ng0);
|
|
||||||
t2 = (t0 + 3928);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(78, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t2 = (t0 + 3160);
|
|
||||||
xsi_process_wait(t2, t7);
|
|
||||||
|
|
||||||
LAB18: *((char **)t1) = &&LAB19;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB13: goto LAB12;
|
|
||||||
|
|
||||||
LAB15: goto LAB13;
|
|
||||||
|
|
||||||
LAB16: xsi_set_current_line(79, ng0);
|
|
||||||
t2 = (t0 + 3800);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(80, ng0);
|
|
||||||
t2 = (t0 + 3864);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(81, ng0);
|
|
||||||
t2 = (t0 + 3928);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(82, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t2 = (t0 + 3160);
|
|
||||||
xsi_process_wait(t2, t7);
|
|
||||||
|
|
||||||
LAB22: *((char **)t1) = &&LAB23;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB17: goto LAB16;
|
|
||||||
|
|
||||||
LAB19: goto LAB17;
|
|
||||||
|
|
||||||
LAB20: xsi_set_current_line(83, ng0);
|
|
||||||
t2 = (t0 + 3800);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(84, ng0);
|
|
||||||
t2 = (t0 + 3864);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(85, ng0);
|
|
||||||
t2 = (t0 + 3928);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(86, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t2 = (t0 + 3160);
|
|
||||||
xsi_process_wait(t2, t7);
|
|
||||||
|
|
||||||
LAB26: *((char **)t1) = &&LAB27;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB21: goto LAB20;
|
|
||||||
|
|
||||||
LAB23: goto LAB21;
|
|
||||||
|
|
||||||
LAB24: xsi_set_current_line(87, ng0);
|
|
||||||
t2 = (t0 + 3800);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)2;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(88, ng0);
|
|
||||||
t2 = (t0 + 3864);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(89, ng0);
|
|
||||||
t2 = (t0 + 3928);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(90, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t2 = (t0 + 3160);
|
|
||||||
xsi_process_wait(t2, t7);
|
|
||||||
|
|
||||||
LAB30: *((char **)t1) = &&LAB31;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB25: goto LAB24;
|
|
||||||
|
|
||||||
LAB27: goto LAB25;
|
|
||||||
|
|
||||||
LAB28: xsi_set_current_line(91, ng0);
|
|
||||||
t2 = (t0 + 3800);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(92, ng0);
|
|
||||||
t2 = (t0 + 3864);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(93, ng0);
|
|
||||||
t2 = (t0 + 3928);
|
|
||||||
t3 = (t2 + 56U);
|
|
||||||
t4 = *((char **)t3);
|
|
||||||
t5 = (t4 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
*((unsigned char *)t6) = (unsigned char)3;
|
|
||||||
xsi_driver_first_trans_fast(t2);
|
|
||||||
xsi_set_current_line(94, ng0);
|
|
||||||
t2 = (t0 + 2128U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t7 = *((int64 *)t3);
|
|
||||||
t2 = (t0 + 3160);
|
|
||||||
xsi_process_wait(t2, t7);
|
|
||||||
|
|
||||||
LAB34: *((char **)t1) = &&LAB35;
|
|
||||||
goto LAB1;
|
|
||||||
|
|
||||||
LAB29: goto LAB28;
|
|
||||||
|
|
||||||
LAB31: goto LAB29;
|
|
||||||
|
|
||||||
LAB32: goto LAB2;
|
|
||||||
|
|
||||||
LAB33: goto LAB32;
|
|
||||||
|
|
||||||
LAB35: goto LAB33;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_2258021406_2372691052_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_2258021406_2372691052_p_0,(void *)work_a_2258021406_2372691052_p_1};
|
|
||||||
xsi_register_didat("work_a_2258021406_2372691052", "isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
@@ -1,29 +0,0 @@
|
|||||||
Command line:
|
|
||||||
NaNCheck_isim_beh.exe
|
|
||||||
-simmode gui
|
|
||||||
-simrunnum 0
|
|
||||||
-socket 39524
|
|
||||||
|
|
||||||
Sat Aug 24 12:14:44 2019
|
|
||||||
|
|
||||||
|
|
||||||
Elaboration Time: 0.02 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 195.346 Meg
|
|
||||||
|
|
||||||
Total Signals : 23
|
|
||||||
Total Nets : 137
|
|
||||||
Total Signal Drivers : 15
|
|
||||||
Total Blocks : 4
|
|
||||||
Total Primitive Blocks : 3
|
|
||||||
Total Processes : 15
|
|
||||||
Total Traceable Variables : 8
|
|
||||||
Total Scalar Nets and Variables : 497
|
|
||||||
Total Line Count : 27
|
|
||||||
|
|
||||||
Total Simulation Time: 0.04 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 272.945 Meg
|
|
||||||
|
|
||||||
Sat Aug 24 12:14:54 2019
|
|
||||||
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,40 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
#include "xsi.h"
|
|
||||||
|
|
||||||
struct XSI_INFO xsi_info;
|
|
||||||
|
|
||||||
char *IEEE_P_2592010699;
|
|
||||||
char *STD_STANDARD;
|
|
||||||
|
|
||||||
|
|
||||||
int main(int argc, char **argv)
|
|
||||||
{
|
|
||||||
xsi_init_design(argc, argv);
|
|
||||||
xsi_register_info(&xsi_info);
|
|
||||||
|
|
||||||
xsi_register_min_prec_unit(-12);
|
|
||||||
ieee_p_2592010699_init();
|
|
||||||
work_a_0557987184_1272247069_init();
|
|
||||||
work_a_4078426953_2628201599_init();
|
|
||||||
|
|
||||||
|
|
||||||
xsi_register_tops("work_a_4078426953_2628201599");
|
|
||||||
|
|
||||||
IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699");
|
|
||||||
xsi_register_ieee_std_logic_1164(IEEE_P_2592010699);
|
|
||||||
STD_STANDARD = xsi_get_engine_memory("std_standard");
|
|
||||||
|
|
||||||
return xsi_run_simulation(argc, argv);
|
|
||||||
|
|
||||||
}
|
|
||||||
Binary file not shown.
@@ -1,368 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/Luca/ISE/IEEE754Adder/TypeCheck.vhd";
|
|
||||||
extern char *IEEE_P_2592010699;
|
|
||||||
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char );
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(17, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1032U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 30);
|
|
||||||
t4 = (t3 * 1U);
|
|
||||||
t5 = (0 + t4);
|
|
||||||
t1 = (t2 + t5);
|
|
||||||
t6 = (t0 + 5104);
|
|
||||||
t7 = (t6 + 56U);
|
|
||||||
t8 = *((char **)t7);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
memcpy(t10, t1, 8U);
|
|
||||||
xsi_driver_first_trans_fast(t6);
|
|
||||||
|
|
||||||
LAB2: t11 = (t0 + 4944);
|
|
||||||
*((int *)t11) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(18, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1032U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 22);
|
|
||||||
t4 = (t3 * 1U);
|
|
||||||
t5 = (0 + t4);
|
|
||||||
t1 = (t2 + t5);
|
|
||||||
t6 = (t0 + 5168);
|
|
||||||
t7 = (t6 + 56U);
|
|
||||||
t8 = *((char **)t7);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
memcpy(t10, t1, 23U);
|
|
||||||
xsi_driver_first_trans_fast(t6);
|
|
||||||
|
|
||||||
LAB2: t11 = (t0 + 4960);
|
|
||||||
*((int *)t11) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_2(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
int t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
int t9;
|
|
||||||
int t10;
|
|
||||||
unsigned int t11;
|
|
||||||
unsigned int t12;
|
|
||||||
unsigned int t13;
|
|
||||||
char *t14;
|
|
||||||
unsigned char t15;
|
|
||||||
unsigned char t16;
|
|
||||||
char *t17;
|
|
||||||
char *t18;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(23, ng0);
|
|
||||||
t1 = (t0 + 2288U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t1 = (t2 + 0);
|
|
||||||
*((unsigned char *)t1) = (unsigned char)3;
|
|
||||||
xsi_set_current_line(24, ng0);
|
|
||||||
t1 = (t0 + 7603);
|
|
||||||
*((int *)t1) = 7;
|
|
||||||
t2 = (t0 + 7607);
|
|
||||||
*((int *)t2) = 0;
|
|
||||||
t3 = 7;
|
|
||||||
t4 = 0;
|
|
||||||
|
|
||||||
LAB2: if (t3 >= t4)
|
|
||||||
goto LAB3;
|
|
||||||
|
|
||||||
LAB5: xsi_set_current_line(27, ng0);
|
|
||||||
t1 = (t0 + 2288U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t7 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 5232);
|
|
||||||
t5 = (t1 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t8 = (t6 + 56U);
|
|
||||||
t14 = *((char **)t8);
|
|
||||||
*((unsigned char *)t14) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t1);
|
|
||||||
t1 = (t0 + 4976);
|
|
||||||
*((int *)t1) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB3: xsi_set_current_line(25, ng0);
|
|
||||||
t5 = (t0 + 2288U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t7 = *((unsigned char *)t6);
|
|
||||||
t5 = (t0 + 1512U);
|
|
||||||
t8 = *((char **)t5);
|
|
||||||
t5 = (t0 + 7603);
|
|
||||||
t9 = *((int *)t5);
|
|
||||||
t10 = (t9 - 7);
|
|
||||||
t11 = (t10 * -1);
|
|
||||||
t12 = (1U * t11);
|
|
||||||
t13 = (0 + t12);
|
|
||||||
t14 = (t8 + t13);
|
|
||||||
t15 = *((unsigned char *)t14);
|
|
||||||
t16 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t7, t15);
|
|
||||||
t17 = (t0 + 2288U);
|
|
||||||
t18 = *((char **)t17);
|
|
||||||
t17 = (t18 + 0);
|
|
||||||
*((unsigned char *)t17) = t16;
|
|
||||||
|
|
||||||
LAB4: t1 = (t0 + 7603);
|
|
||||||
t3 = *((int *)t1);
|
|
||||||
t2 = (t0 + 7607);
|
|
||||||
t4 = *((int *)t2);
|
|
||||||
if (t3 == t4)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t9 = (t3 + -1);
|
|
||||||
t3 = t9;
|
|
||||||
t5 = (t0 + 7603);
|
|
||||||
*((int *)t5) = t3;
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_3(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
int t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
int t9;
|
|
||||||
int t10;
|
|
||||||
unsigned int t11;
|
|
||||||
unsigned int t12;
|
|
||||||
unsigned int t13;
|
|
||||||
char *t14;
|
|
||||||
unsigned char t15;
|
|
||||||
unsigned char t16;
|
|
||||||
char *t17;
|
|
||||||
char *t18;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(33, ng0);
|
|
||||||
t1 = (t0 + 2408U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t1 = (t2 + 0);
|
|
||||||
*((unsigned char *)t1) = (unsigned char)2;
|
|
||||||
xsi_set_current_line(34, ng0);
|
|
||||||
t1 = (t0 + 7611);
|
|
||||||
*((int *)t1) = 22;
|
|
||||||
t2 = (t0 + 7615);
|
|
||||||
*((int *)t2) = 0;
|
|
||||||
t3 = 22;
|
|
||||||
t4 = 0;
|
|
||||||
|
|
||||||
LAB2: if (t3 >= t4)
|
|
||||||
goto LAB3;
|
|
||||||
|
|
||||||
LAB5: xsi_set_current_line(37, ng0);
|
|
||||||
t1 = (t0 + 2408U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t7 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 5296);
|
|
||||||
t5 = (t1 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t8 = (t6 + 56U);
|
|
||||||
t14 = *((char **)t8);
|
|
||||||
*((unsigned char *)t14) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t1);
|
|
||||||
t1 = (t0 + 4992);
|
|
||||||
*((int *)t1) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB3: xsi_set_current_line(35, ng0);
|
|
||||||
t5 = (t0 + 2408U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t7 = *((unsigned char *)t6);
|
|
||||||
t5 = (t0 + 1672U);
|
|
||||||
t8 = *((char **)t5);
|
|
||||||
t5 = (t0 + 7611);
|
|
||||||
t9 = *((int *)t5);
|
|
||||||
t10 = (t9 - 22);
|
|
||||||
t11 = (t10 * -1);
|
|
||||||
t12 = (1U * t11);
|
|
||||||
t13 = (0 + t12);
|
|
||||||
t14 = (t8 + t13);
|
|
||||||
t15 = *((unsigned char *)t14);
|
|
||||||
t16 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t7, t15);
|
|
||||||
t17 = (t0 + 2408U);
|
|
||||||
t18 = *((char **)t17);
|
|
||||||
t17 = (t18 + 0);
|
|
||||||
*((unsigned char *)t17) = t16;
|
|
||||||
|
|
||||||
LAB4: t1 = (t0 + 7611);
|
|
||||||
t3 = *((int *)t1);
|
|
||||||
t2 = (t0 + 7615);
|
|
||||||
t4 = *((int *)t2);
|
|
||||||
if (t3 == t4)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t9 = (t3 + -1);
|
|
||||||
t3 = t9;
|
|
||||||
t5 = (t0 + 7611);
|
|
||||||
*((int *)t5) = t3;
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_4(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
unsigned char t5;
|
|
||||||
unsigned char t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(40, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1832U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1992U);
|
|
||||||
t4 = *((char **)t1);
|
|
||||||
t5 = *((unsigned char *)t4);
|
|
||||||
t6 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t3, t5);
|
|
||||||
t1 = (t0 + 5360);
|
|
||||||
t7 = (t1 + 56U);
|
|
||||||
t8 = *((char **)t7);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
*((unsigned char *)t10) = t6;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
|
|
||||||
LAB2: t11 = (t0 + 5008);
|
|
||||||
*((int *)t11) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_5(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
unsigned char t5;
|
|
||||||
unsigned char t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(41, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1832U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1992U);
|
|
||||||
t4 = *((char **)t1);
|
|
||||||
t5 = *((unsigned char *)t4);
|
|
||||||
t6 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t5);
|
|
||||||
t7 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t3, t6);
|
|
||||||
t1 = (t0 + 5424);
|
|
||||||
t8 = (t1 + 56U);
|
|
||||||
t9 = *((char **)t8);
|
|
||||||
t10 = (t9 + 56U);
|
|
||||||
t11 = *((char **)t10);
|
|
||||||
*((unsigned char *)t11) = t7;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
|
|
||||||
LAB2: t12 = (t0 + 5024);
|
|
||||||
*((int *)t12) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_0557987184_1272247069_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_0557987184_1272247069_p_0,(void *)work_a_0557987184_1272247069_p_1,(void *)work_a_0557987184_1272247069_p_2,(void *)work_a_0557987184_1272247069_p_3,(void *)work_a_0557987184_1272247069_p_4,(void *)work_a_0557987184_1272247069_p_5};
|
|
||||||
xsi_register_didat("work_a_0557987184_1272247069", "isim/NaNCheck_isim_beh.exe.sim/work/a_0557987184_1272247069.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,221 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/Luca/ISE/IEEE754Adder/NaNCheck.vhd";
|
|
||||||
extern char *IEEE_P_2592010699;
|
|
||||||
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char );
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_4078426953_2628201599_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
unsigned int t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(32, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1032U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 31);
|
|
||||||
t4 = (t3 * -1);
|
|
||||||
t5 = (1U * t4);
|
|
||||||
t6 = (0 + t5);
|
|
||||||
t1 = (t2 + t6);
|
|
||||||
t7 = *((unsigned char *)t1);
|
|
||||||
t8 = (t0 + 4392);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
t11 = (t10 + 56U);
|
|
||||||
t12 = *((char **)t11);
|
|
||||||
*((unsigned char *)t12) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t8);
|
|
||||||
|
|
||||||
LAB2: t13 = (t0 + 4280);
|
|
||||||
*((int *)t13) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_4078426953_2628201599_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
unsigned int t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(33, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1192U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 31);
|
|
||||||
t4 = (t3 * -1);
|
|
||||||
t5 = (1U * t4);
|
|
||||||
t6 = (0 + t5);
|
|
||||||
t1 = (t2 + t6);
|
|
||||||
t7 = *((unsigned char *)t1);
|
|
||||||
t8 = (t0 + 4456);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
t11 = (t10 + 56U);
|
|
||||||
t12 = *((char **)t11);
|
|
||||||
*((unsigned char *)t12) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t8);
|
|
||||||
|
|
||||||
LAB2: t13 = (t0 + 4296);
|
|
||||||
*((int *)t13) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_4078426953_2628201599_p_2(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
unsigned char t5;
|
|
||||||
unsigned char t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned char t8;
|
|
||||||
char *t9;
|
|
||||||
unsigned char t10;
|
|
||||||
unsigned char t11;
|
|
||||||
char *t12;
|
|
||||||
unsigned char t13;
|
|
||||||
unsigned char t14;
|
|
||||||
char *t15;
|
|
||||||
unsigned char t16;
|
|
||||||
unsigned char t17;
|
|
||||||
unsigned char t18;
|
|
||||||
unsigned char t19;
|
|
||||||
char *t20;
|
|
||||||
unsigned char t21;
|
|
||||||
char *t22;
|
|
||||||
unsigned char t23;
|
|
||||||
unsigned char t24;
|
|
||||||
unsigned char t25;
|
|
||||||
char *t26;
|
|
||||||
unsigned char t27;
|
|
||||||
unsigned char t28;
|
|
||||||
char *t29;
|
|
||||||
unsigned char t30;
|
|
||||||
unsigned char t31;
|
|
||||||
unsigned char t32;
|
|
||||||
char *t33;
|
|
||||||
char *t34;
|
|
||||||
char *t35;
|
|
||||||
char *t36;
|
|
||||||
char *t37;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(35, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1512U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1992U);
|
|
||||||
t4 = *((char **)t1);
|
|
||||||
t5 = *((unsigned char *)t4);
|
|
||||||
t6 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t3, t5);
|
|
||||||
t1 = (t0 + 1672U);
|
|
||||||
t7 = *((char **)t1);
|
|
||||||
t8 = *((unsigned char *)t7);
|
|
||||||
t1 = (t0 + 1832U);
|
|
||||||
t9 = *((char **)t1);
|
|
||||||
t10 = *((unsigned char *)t9);
|
|
||||||
t11 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t8, t10);
|
|
||||||
t1 = (t0 + 2152U);
|
|
||||||
t12 = *((char **)t1);
|
|
||||||
t13 = *((unsigned char *)t12);
|
|
||||||
t14 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t11, t13);
|
|
||||||
t1 = (t0 + 2312U);
|
|
||||||
t15 = *((char **)t1);
|
|
||||||
t16 = *((unsigned char *)t15);
|
|
||||||
t17 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t16);
|
|
||||||
t18 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t14, t17);
|
|
||||||
t19 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t6, t18);
|
|
||||||
t1 = (t0 + 1672U);
|
|
||||||
t20 = *((char **)t1);
|
|
||||||
t21 = *((unsigned char *)t20);
|
|
||||||
t1 = (t0 + 1832U);
|
|
||||||
t22 = *((char **)t1);
|
|
||||||
t23 = *((unsigned char *)t22);
|
|
||||||
t24 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t23);
|
|
||||||
t25 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t21, t24);
|
|
||||||
t1 = (t0 + 2152U);
|
|
||||||
t26 = *((char **)t1);
|
|
||||||
t27 = *((unsigned char *)t26);
|
|
||||||
t28 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t25, t27);
|
|
||||||
t1 = (t0 + 2312U);
|
|
||||||
t29 = *((char **)t1);
|
|
||||||
t30 = *((unsigned char *)t29);
|
|
||||||
t31 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t28, t30);
|
|
||||||
t32 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t19, t31);
|
|
||||||
t1 = (t0 + 4520);
|
|
||||||
t33 = (t1 + 56U);
|
|
||||||
t34 = *((char **)t33);
|
|
||||||
t35 = (t34 + 56U);
|
|
||||||
t36 = *((char **)t35);
|
|
||||||
*((unsigned char *)t36) = t32;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
|
|
||||||
LAB2: t37 = (t0 + 4312);
|
|
||||||
*((int *)t37) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_4078426953_2628201599_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_4078426953_2628201599_p_0,(void *)work_a_4078426953_2628201599_p_1,(void *)work_a_4078426953_2628201599_p_2};
|
|
||||||
xsi_register_didat("work_a_4078426953_2628201599", "isim/NaNCheck_isim_beh.exe.sim/work/a_4078426953_2628201599.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
@@ -1,29 +0,0 @@
|
|||||||
Command line:
|
|
||||||
SpecialCasesCheck_isim_beh.exe
|
|
||||||
-simmode gui
|
|
||||||
-simrunnum 0
|
|
||||||
-socket 46093
|
|
||||||
|
|
||||||
Sat Aug 24 14:53:42 2019
|
|
||||||
|
|
||||||
|
|
||||||
Elaboration Time: 0.02 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 195.351 Meg
|
|
||||||
|
|
||||||
Total Signals : 40
|
|
||||||
Total Nets : 235
|
|
||||||
Total Signal Drivers : 23
|
|
||||||
Total Blocks : 7
|
|
||||||
Total Primitive Blocks : 4
|
|
||||||
Total Processes : 23
|
|
||||||
Total Traceable Variables : 9
|
|
||||||
Total Scalar Nets and Variables : 596
|
|
||||||
Total Line Count : 38
|
|
||||||
|
|
||||||
Total Simulation Time: 0.02 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 272.949 Meg
|
|
||||||
|
|
||||||
Sat Aug 24 14:53:52 2019
|
|
||||||
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,43 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
#include "xsi.h"
|
|
||||||
|
|
||||||
struct XSI_INFO xsi_info;
|
|
||||||
|
|
||||||
char *IEEE_P_2592010699;
|
|
||||||
char *STD_STANDARD;
|
|
||||||
|
|
||||||
|
|
||||||
int main(int argc, char **argv)
|
|
||||||
{
|
|
||||||
xsi_init_design(argc, argv);
|
|
||||||
xsi_register_info(&xsi_info);
|
|
||||||
|
|
||||||
xsi_register_min_prec_unit(-12);
|
|
||||||
ieee_p_2592010699_init();
|
|
||||||
work_a_0557987184_1272247069_init();
|
|
||||||
work_a_3914402253_2628201599_init();
|
|
||||||
work_a_2347761600_1146481140_init();
|
|
||||||
work_a_1540508602_4151211736_init();
|
|
||||||
work_a_1684417184_3395701438_init();
|
|
||||||
|
|
||||||
|
|
||||||
xsi_register_tops("work_a_1684417184_3395701438");
|
|
||||||
|
|
||||||
IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699");
|
|
||||||
xsi_register_ieee_std_logic_1164(IEEE_P_2592010699);
|
|
||||||
STD_STANDARD = xsi_get_engine_memory("std_standard");
|
|
||||||
|
|
||||||
return xsi_run_simulation(argc, argv);
|
|
||||||
|
|
||||||
}
|
|
||||||
BIN
Binary file not shown.
@@ -1,368 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/Luca/ISE/IEEE754Adder/TypeCheck.vhd";
|
|
||||||
extern char *IEEE_P_2592010699;
|
|
||||||
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char );
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(17, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1032U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 30);
|
|
||||||
t4 = (t3 * 1U);
|
|
||||||
t5 = (0 + t4);
|
|
||||||
t1 = (t2 + t5);
|
|
||||||
t6 = (t0 + 5104);
|
|
||||||
t7 = (t6 + 56U);
|
|
||||||
t8 = *((char **)t7);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
memcpy(t10, t1, 8U);
|
|
||||||
xsi_driver_first_trans_fast(t6);
|
|
||||||
|
|
||||||
LAB2: t11 = (t0 + 4944);
|
|
||||||
*((int *)t11) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(18, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1032U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 22);
|
|
||||||
t4 = (t3 * 1U);
|
|
||||||
t5 = (0 + t4);
|
|
||||||
t1 = (t2 + t5);
|
|
||||||
t6 = (t0 + 5168);
|
|
||||||
t7 = (t6 + 56U);
|
|
||||||
t8 = *((char **)t7);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
memcpy(t10, t1, 23U);
|
|
||||||
xsi_driver_first_trans_fast(t6);
|
|
||||||
|
|
||||||
LAB2: t11 = (t0 + 4960);
|
|
||||||
*((int *)t11) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_2(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
int t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
int t9;
|
|
||||||
int t10;
|
|
||||||
unsigned int t11;
|
|
||||||
unsigned int t12;
|
|
||||||
unsigned int t13;
|
|
||||||
char *t14;
|
|
||||||
unsigned char t15;
|
|
||||||
unsigned char t16;
|
|
||||||
char *t17;
|
|
||||||
char *t18;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(23, ng0);
|
|
||||||
t1 = (t0 + 2288U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t1 = (t2 + 0);
|
|
||||||
*((unsigned char *)t1) = (unsigned char)3;
|
|
||||||
xsi_set_current_line(24, ng0);
|
|
||||||
t1 = (t0 + 7603);
|
|
||||||
*((int *)t1) = 7;
|
|
||||||
t2 = (t0 + 7607);
|
|
||||||
*((int *)t2) = 0;
|
|
||||||
t3 = 7;
|
|
||||||
t4 = 0;
|
|
||||||
|
|
||||||
LAB2: if (t3 >= t4)
|
|
||||||
goto LAB3;
|
|
||||||
|
|
||||||
LAB5: xsi_set_current_line(27, ng0);
|
|
||||||
t1 = (t0 + 2288U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t7 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 5232);
|
|
||||||
t5 = (t1 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t8 = (t6 + 56U);
|
|
||||||
t14 = *((char **)t8);
|
|
||||||
*((unsigned char *)t14) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t1);
|
|
||||||
t1 = (t0 + 4976);
|
|
||||||
*((int *)t1) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB3: xsi_set_current_line(25, ng0);
|
|
||||||
t5 = (t0 + 2288U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t7 = *((unsigned char *)t6);
|
|
||||||
t5 = (t0 + 1512U);
|
|
||||||
t8 = *((char **)t5);
|
|
||||||
t5 = (t0 + 7603);
|
|
||||||
t9 = *((int *)t5);
|
|
||||||
t10 = (t9 - 7);
|
|
||||||
t11 = (t10 * -1);
|
|
||||||
t12 = (1U * t11);
|
|
||||||
t13 = (0 + t12);
|
|
||||||
t14 = (t8 + t13);
|
|
||||||
t15 = *((unsigned char *)t14);
|
|
||||||
t16 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t7, t15);
|
|
||||||
t17 = (t0 + 2288U);
|
|
||||||
t18 = *((char **)t17);
|
|
||||||
t17 = (t18 + 0);
|
|
||||||
*((unsigned char *)t17) = t16;
|
|
||||||
|
|
||||||
LAB4: t1 = (t0 + 7603);
|
|
||||||
t3 = *((int *)t1);
|
|
||||||
t2 = (t0 + 7607);
|
|
||||||
t4 = *((int *)t2);
|
|
||||||
if (t3 == t4)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t9 = (t3 + -1);
|
|
||||||
t3 = t9;
|
|
||||||
t5 = (t0 + 7603);
|
|
||||||
*((int *)t5) = t3;
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_3(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
int t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
int t9;
|
|
||||||
int t10;
|
|
||||||
unsigned int t11;
|
|
||||||
unsigned int t12;
|
|
||||||
unsigned int t13;
|
|
||||||
char *t14;
|
|
||||||
unsigned char t15;
|
|
||||||
unsigned char t16;
|
|
||||||
char *t17;
|
|
||||||
char *t18;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(33, ng0);
|
|
||||||
t1 = (t0 + 2408U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t1 = (t2 + 0);
|
|
||||||
*((unsigned char *)t1) = (unsigned char)2;
|
|
||||||
xsi_set_current_line(34, ng0);
|
|
||||||
t1 = (t0 + 7611);
|
|
||||||
*((int *)t1) = 22;
|
|
||||||
t2 = (t0 + 7615);
|
|
||||||
*((int *)t2) = 0;
|
|
||||||
t3 = 22;
|
|
||||||
t4 = 0;
|
|
||||||
|
|
||||||
LAB2: if (t3 >= t4)
|
|
||||||
goto LAB3;
|
|
||||||
|
|
||||||
LAB5: xsi_set_current_line(37, ng0);
|
|
||||||
t1 = (t0 + 2408U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t7 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 5296);
|
|
||||||
t5 = (t1 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t8 = (t6 + 56U);
|
|
||||||
t14 = *((char **)t8);
|
|
||||||
*((unsigned char *)t14) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t1);
|
|
||||||
t1 = (t0 + 4992);
|
|
||||||
*((int *)t1) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB3: xsi_set_current_line(35, ng0);
|
|
||||||
t5 = (t0 + 2408U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t7 = *((unsigned char *)t6);
|
|
||||||
t5 = (t0 + 1672U);
|
|
||||||
t8 = *((char **)t5);
|
|
||||||
t5 = (t0 + 7611);
|
|
||||||
t9 = *((int *)t5);
|
|
||||||
t10 = (t9 - 22);
|
|
||||||
t11 = (t10 * -1);
|
|
||||||
t12 = (1U * t11);
|
|
||||||
t13 = (0 + t12);
|
|
||||||
t14 = (t8 + t13);
|
|
||||||
t15 = *((unsigned char *)t14);
|
|
||||||
t16 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t7, t15);
|
|
||||||
t17 = (t0 + 2408U);
|
|
||||||
t18 = *((char **)t17);
|
|
||||||
t17 = (t18 + 0);
|
|
||||||
*((unsigned char *)t17) = t16;
|
|
||||||
|
|
||||||
LAB4: t1 = (t0 + 7611);
|
|
||||||
t3 = *((int *)t1);
|
|
||||||
t2 = (t0 + 7615);
|
|
||||||
t4 = *((int *)t2);
|
|
||||||
if (t3 == t4)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t9 = (t3 + -1);
|
|
||||||
t3 = t9;
|
|
||||||
t5 = (t0 + 7611);
|
|
||||||
*((int *)t5) = t3;
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_4(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
unsigned char t5;
|
|
||||||
unsigned char t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(40, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1832U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1992U);
|
|
||||||
t4 = *((char **)t1);
|
|
||||||
t5 = *((unsigned char *)t4);
|
|
||||||
t6 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t3, t5);
|
|
||||||
t1 = (t0 + 5360);
|
|
||||||
t7 = (t1 + 56U);
|
|
||||||
t8 = *((char **)t7);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
*((unsigned char *)t10) = t6;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
|
|
||||||
LAB2: t11 = (t0 + 5008);
|
|
||||||
*((int *)t11) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_0557987184_1272247069_p_5(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
unsigned char t5;
|
|
||||||
unsigned char t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(41, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1832U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1992U);
|
|
||||||
t4 = *((char **)t1);
|
|
||||||
t5 = *((unsigned char *)t4);
|
|
||||||
t6 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t5);
|
|
||||||
t7 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t3, t6);
|
|
||||||
t1 = (t0 + 5424);
|
|
||||||
t8 = (t1 + 56U);
|
|
||||||
t9 = *((char **)t8);
|
|
||||||
t10 = (t9 + 56U);
|
|
||||||
t11 = *((char **)t10);
|
|
||||||
*((unsigned char *)t11) = t7;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
|
|
||||||
LAB2: t12 = (t0 + 5024);
|
|
||||||
*((int *)t12) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_0557987184_1272247069_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_0557987184_1272247069_p_0,(void *)work_a_0557987184_1272247069_p_1,(void *)work_a_0557987184_1272247069_p_2,(void *)work_a_0557987184_1272247069_p_3,(void *)work_a_0557987184_1272247069_p_4,(void *)work_a_0557987184_1272247069_p_5};
|
|
||||||
xsi_register_didat("work_a_0557987184_1272247069", "isim/SpecialCasesCheck_isim_beh.exe.sim/work/a_0557987184_1272247069.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,278 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/Luca/ISE/IEEE754Adder/ZeroCheck.vhd";
|
|
||||||
extern char *IEEE_P_2592010699;
|
|
||||||
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3496108612141461530_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char );
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_1540508602_4151211736_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
unsigned int t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(28, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1032U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 31);
|
|
||||||
t4 = (t3 * -1);
|
|
||||||
t5 = (1U * t4);
|
|
||||||
t6 = (0 + t5);
|
|
||||||
t1 = (t2 + t6);
|
|
||||||
t7 = *((unsigned char *)t1);
|
|
||||||
t8 = (t0 + 5184);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
t11 = (t10 + 56U);
|
|
||||||
t12 = *((char **)t11);
|
|
||||||
*((unsigned char *)t12) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t8);
|
|
||||||
|
|
||||||
LAB2: t13 = (t0 + 5024);
|
|
||||||
*((int *)t13) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_1540508602_4151211736_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
unsigned int t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(29, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1192U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 31);
|
|
||||||
t4 = (t3 * -1);
|
|
||||||
t5 = (1U * t4);
|
|
||||||
t6 = (0 + t5);
|
|
||||||
t1 = (t2 + t6);
|
|
||||||
t7 = *((unsigned char *)t1);
|
|
||||||
t8 = (t0 + 5248);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
t11 = (t10 + 56U);
|
|
||||||
t12 = *((char **)t11);
|
|
||||||
*((unsigned char *)t12) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t8);
|
|
||||||
|
|
||||||
LAB2: t13 = (t0 + 5040);
|
|
||||||
*((int *)t13) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_1540508602_4151211736_p_2(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(30, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1032U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 30);
|
|
||||||
t4 = (t3 * 1U);
|
|
||||||
t5 = (0 + t4);
|
|
||||||
t1 = (t2 + t5);
|
|
||||||
t6 = (t0 + 5312);
|
|
||||||
t7 = (t6 + 56U);
|
|
||||||
t8 = *((char **)t7);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
memcpy(t10, t1, 31U);
|
|
||||||
xsi_driver_first_trans_fast(t6);
|
|
||||||
|
|
||||||
LAB2: t11 = (t0 + 5056);
|
|
||||||
*((int *)t11) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_1540508602_4151211736_p_3(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(31, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1192U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 30);
|
|
||||||
t4 = (t3 * 1U);
|
|
||||||
t5 = (0 + t4);
|
|
||||||
t1 = (t2 + t5);
|
|
||||||
t6 = (t0 + 5376);
|
|
||||||
t7 = (t6 + 56U);
|
|
||||||
t8 = *((char **)t7);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
memcpy(t10, t1, 31U);
|
|
||||||
xsi_driver_first_trans_fast(t6);
|
|
||||||
|
|
||||||
LAB2: t11 = (t0 + 5072);
|
|
||||||
*((int *)t11) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_1540508602_4151211736_p_4(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
unsigned char t5;
|
|
||||||
unsigned char t6;
|
|
||||||
char *t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(33, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1512U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1672U);
|
|
||||||
t4 = *((char **)t1);
|
|
||||||
t5 = *((unsigned char *)t4);
|
|
||||||
t6 = ieee_p_2592010699_sub_3496108612141461530_503743352(IEEE_P_2592010699, t3, t5);
|
|
||||||
t1 = (t0 + 5440);
|
|
||||||
t7 = (t1 + 56U);
|
|
||||||
t8 = *((char **)t7);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
*((unsigned char *)t10) = t6;
|
|
||||||
xsi_driver_first_trans_fast(t1);
|
|
||||||
|
|
||||||
LAB2: t11 = (t0 + 5088);
|
|
||||||
*((int *)t11) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_1540508602_4151211736_p_5(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
unsigned char t4;
|
|
||||||
char *t5;
|
|
||||||
unsigned char t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(38, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 2312U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t4 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t3);
|
|
||||||
t1 = (t0 + 2152U);
|
|
||||||
t5 = *((char **)t1);
|
|
||||||
t6 = *((unsigned char *)t5);
|
|
||||||
t7 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t4, t6);
|
|
||||||
t1 = (t0 + 5504);
|
|
||||||
t8 = (t1 + 56U);
|
|
||||||
t9 = *((char **)t8);
|
|
||||||
t10 = (t9 + 56U);
|
|
||||||
t11 = *((char **)t10);
|
|
||||||
*((unsigned char *)t11) = t7;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
|
|
||||||
LAB2: t12 = (t0 + 5104);
|
|
||||||
*((int *)t12) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_1540508602_4151211736_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_1540508602_4151211736_p_0,(void *)work_a_1540508602_4151211736_p_1,(void *)work_a_1540508602_4151211736_p_2,(void *)work_a_1540508602_4151211736_p_3,(void *)work_a_1540508602_4151211736_p_4,(void *)work_a_1540508602_4151211736_p_5};
|
|
||||||
xsi_register_didat("work_a_1540508602_4151211736", "isim/SpecialCasesCheck_isim_beh.exe.sim/work/a_1540508602_4151211736.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,31 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_1684417184_3395701438_init()
|
|
||||||
{
|
|
||||||
xsi_register_didat("work_a_1684417184_3395701438", "isim/SpecialCasesCheck_isim_beh.exe.sim/work/a_1684417184_3395701438.didat");
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,180 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/Luca/ISE/IEEE754Adder/EqualCheck.vhd";
|
|
||||||
extern char *IEEE_P_2592010699;
|
|
||||||
|
|
||||||
char *ieee_p_2592010699_sub_16439989833707593767_503743352(char *, char *, char *, char *, char *, char *);
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char );
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_2347761600_1146481140_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char t1[16];
|
|
||||||
char *t2;
|
|
||||||
char *t3;
|
|
||||||
char *t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned int t8;
|
|
||||||
unsigned int t9;
|
|
||||||
unsigned char t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
char *t14;
|
|
||||||
char *t15;
|
|
||||||
char *t16;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(15, ng0);
|
|
||||||
|
|
||||||
LAB3: t2 = (t0 + 1032U);
|
|
||||||
t3 = *((char **)t2);
|
|
||||||
t2 = (t0 + 5352U);
|
|
||||||
t4 = (t0 + 1192U);
|
|
||||||
t5 = *((char **)t4);
|
|
||||||
t4 = (t0 + 5368U);
|
|
||||||
t6 = ieee_p_2592010699_sub_16439989833707593767_503743352(IEEE_P_2592010699, t1, t3, t2, t5, t4);
|
|
||||||
t7 = (t1 + 12U);
|
|
||||||
t8 = *((unsigned int *)t7);
|
|
||||||
t9 = (1U * t8);
|
|
||||||
t10 = (31U != t9);
|
|
||||||
if (t10 == 1)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t11 = (t0 + 3568);
|
|
||||||
t12 = (t11 + 56U);
|
|
||||||
t13 = *((char **)t12);
|
|
||||||
t14 = (t13 + 56U);
|
|
||||||
t15 = *((char **)t14);
|
|
||||||
memcpy(t15, t6, 31U);
|
|
||||||
xsi_driver_first_trans_fast(t11);
|
|
||||||
|
|
||||||
LAB2: t16 = (t0 + 3472);
|
|
||||||
*((int *)t16) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
LAB5: xsi_size_not_matching(31U, t9, 0);
|
|
||||||
goto LAB6;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_2347761600_1146481140_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
int t4;
|
|
||||||
char *t5;
|
|
||||||
char *t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
int t9;
|
|
||||||
int t10;
|
|
||||||
unsigned int t11;
|
|
||||||
unsigned int t12;
|
|
||||||
unsigned int t13;
|
|
||||||
char *t14;
|
|
||||||
unsigned char t15;
|
|
||||||
unsigned char t16;
|
|
||||||
char *t17;
|
|
||||||
char *t18;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(20, ng0);
|
|
||||||
t1 = (t0 + 1928U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t1 = (t2 + 0);
|
|
||||||
*((unsigned char *)t1) = (unsigned char)2;
|
|
||||||
xsi_set_current_line(21, ng0);
|
|
||||||
t1 = (t0 + 5506);
|
|
||||||
*((int *)t1) = 30;
|
|
||||||
t2 = (t0 + 5510);
|
|
||||||
*((int *)t2) = 0;
|
|
||||||
t3 = 30;
|
|
||||||
t4 = 0;
|
|
||||||
|
|
||||||
LAB2: if (t3 >= t4)
|
|
||||||
goto LAB3;
|
|
||||||
|
|
||||||
LAB5: xsi_set_current_line(24, ng0);
|
|
||||||
t1 = (t0 + 1928U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t7 = *((unsigned char *)t2);
|
|
||||||
t15 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t7);
|
|
||||||
t1 = (t0 + 3632);
|
|
||||||
t5 = (t1 + 56U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t8 = (t6 + 56U);
|
|
||||||
t14 = *((char **)t8);
|
|
||||||
*((unsigned char *)t14) = t15;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
t1 = (t0 + 3488);
|
|
||||||
*((int *)t1) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB3: xsi_set_current_line(22, ng0);
|
|
||||||
t5 = (t0 + 1928U);
|
|
||||||
t6 = *((char **)t5);
|
|
||||||
t7 = *((unsigned char *)t6);
|
|
||||||
t5 = (t0 + 1512U);
|
|
||||||
t8 = *((char **)t5);
|
|
||||||
t5 = (t0 + 5506);
|
|
||||||
t9 = *((int *)t5);
|
|
||||||
t10 = (t9 - 30);
|
|
||||||
t11 = (t10 * -1);
|
|
||||||
t12 = (1U * t11);
|
|
||||||
t13 = (0 + t12);
|
|
||||||
t14 = (t8 + t13);
|
|
||||||
t15 = *((unsigned char *)t14);
|
|
||||||
t16 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t7, t15);
|
|
||||||
t17 = (t0 + 1928U);
|
|
||||||
t18 = *((char **)t17);
|
|
||||||
t17 = (t18 + 0);
|
|
||||||
*((unsigned char *)t17) = t16;
|
|
||||||
|
|
||||||
LAB4: t1 = (t0 + 5506);
|
|
||||||
t3 = *((int *)t1);
|
|
||||||
t2 = (t0 + 5510);
|
|
||||||
t4 = *((int *)t2);
|
|
||||||
if (t3 == t4)
|
|
||||||
goto LAB5;
|
|
||||||
|
|
||||||
LAB6: t9 = (t3 + -1);
|
|
||||||
t3 = t9;
|
|
||||||
t5 = (t0 + 5506);
|
|
||||||
*((int *)t5) = t3;
|
|
||||||
goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_2347761600_1146481140_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_2347761600_1146481140_p_0,(void *)work_a_2347761600_1146481140_p_1};
|
|
||||||
xsi_register_didat("work_a_2347761600_1146481140", "isim/SpecialCasesCheck_isim_beh.exe.sim/work/a_2347761600_1146481140.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,221 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
/* This file is designed for use with ISim build 0xfbc00daa */
|
|
||||||
|
|
||||||
#define XSI_HIDE_SYMBOL_SPEC true
|
|
||||||
#include "xsi.h"
|
|
||||||
#include <memory.h>
|
|
||||||
#ifdef __GNUC__
|
|
||||||
#include <stdlib.h>
|
|
||||||
#else
|
|
||||||
#include <malloc.h>
|
|
||||||
#define alloca _alloca
|
|
||||||
#endif
|
|
||||||
static const char *ng0 = "/home/Luca/ISE/IEEE754Adder/NaNCheck.vhd";
|
|
||||||
extern char *IEEE_P_2592010699;
|
|
||||||
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char );
|
|
||||||
unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char );
|
|
||||||
|
|
||||||
|
|
||||||
static void work_a_3914402253_2628201599_p_0(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
unsigned int t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(32, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1032U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 31);
|
|
||||||
t4 = (t3 * -1);
|
|
||||||
t5 = (1U * t4);
|
|
||||||
t6 = (0 + t5);
|
|
||||||
t1 = (t2 + t6);
|
|
||||||
t7 = *((unsigned char *)t1);
|
|
||||||
t8 = (t0 + 4392);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
t11 = (t10 + 56U);
|
|
||||||
t12 = *((char **)t11);
|
|
||||||
*((unsigned char *)t12) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t8);
|
|
||||||
|
|
||||||
LAB2: t13 = (t0 + 4280);
|
|
||||||
*((int *)t13) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_3914402253_2628201599_p_1(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
int t3;
|
|
||||||
unsigned int t4;
|
|
||||||
unsigned int t5;
|
|
||||||
unsigned int t6;
|
|
||||||
unsigned char t7;
|
|
||||||
char *t8;
|
|
||||||
char *t9;
|
|
||||||
char *t10;
|
|
||||||
char *t11;
|
|
||||||
char *t12;
|
|
||||||
char *t13;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(33, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1192U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = (31 - 31);
|
|
||||||
t4 = (t3 * -1);
|
|
||||||
t5 = (1U * t4);
|
|
||||||
t6 = (0 + t5);
|
|
||||||
t1 = (t2 + t6);
|
|
||||||
t7 = *((unsigned char *)t1);
|
|
||||||
t8 = (t0 + 4456);
|
|
||||||
t9 = (t8 + 56U);
|
|
||||||
t10 = *((char **)t9);
|
|
||||||
t11 = (t10 + 56U);
|
|
||||||
t12 = *((char **)t11);
|
|
||||||
*((unsigned char *)t12) = t7;
|
|
||||||
xsi_driver_first_trans_fast(t8);
|
|
||||||
|
|
||||||
LAB2: t13 = (t0 + 4296);
|
|
||||||
*((int *)t13) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void work_a_3914402253_2628201599_p_2(char *t0)
|
|
||||||
{
|
|
||||||
char *t1;
|
|
||||||
char *t2;
|
|
||||||
unsigned char t3;
|
|
||||||
char *t4;
|
|
||||||
unsigned char t5;
|
|
||||||
unsigned char t6;
|
|
||||||
char *t7;
|
|
||||||
unsigned char t8;
|
|
||||||
char *t9;
|
|
||||||
unsigned char t10;
|
|
||||||
unsigned char t11;
|
|
||||||
char *t12;
|
|
||||||
unsigned char t13;
|
|
||||||
unsigned char t14;
|
|
||||||
char *t15;
|
|
||||||
unsigned char t16;
|
|
||||||
unsigned char t17;
|
|
||||||
unsigned char t18;
|
|
||||||
unsigned char t19;
|
|
||||||
char *t20;
|
|
||||||
unsigned char t21;
|
|
||||||
char *t22;
|
|
||||||
unsigned char t23;
|
|
||||||
unsigned char t24;
|
|
||||||
unsigned char t25;
|
|
||||||
char *t26;
|
|
||||||
unsigned char t27;
|
|
||||||
unsigned char t28;
|
|
||||||
char *t29;
|
|
||||||
unsigned char t30;
|
|
||||||
unsigned char t31;
|
|
||||||
unsigned char t32;
|
|
||||||
char *t33;
|
|
||||||
char *t34;
|
|
||||||
char *t35;
|
|
||||||
char *t36;
|
|
||||||
char *t37;
|
|
||||||
|
|
||||||
LAB0: xsi_set_current_line(35, ng0);
|
|
||||||
|
|
||||||
LAB3: t1 = (t0 + 1512U);
|
|
||||||
t2 = *((char **)t1);
|
|
||||||
t3 = *((unsigned char *)t2);
|
|
||||||
t1 = (t0 + 1992U);
|
|
||||||
t4 = *((char **)t1);
|
|
||||||
t5 = *((unsigned char *)t4);
|
|
||||||
t6 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t3, t5);
|
|
||||||
t1 = (t0 + 1672U);
|
|
||||||
t7 = *((char **)t1);
|
|
||||||
t8 = *((unsigned char *)t7);
|
|
||||||
t1 = (t0 + 1832U);
|
|
||||||
t9 = *((char **)t1);
|
|
||||||
t10 = *((unsigned char *)t9);
|
|
||||||
t11 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t8, t10);
|
|
||||||
t1 = (t0 + 2152U);
|
|
||||||
t12 = *((char **)t1);
|
|
||||||
t13 = *((unsigned char *)t12);
|
|
||||||
t14 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t11, t13);
|
|
||||||
t1 = (t0 + 2312U);
|
|
||||||
t15 = *((char **)t1);
|
|
||||||
t16 = *((unsigned char *)t15);
|
|
||||||
t17 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t16);
|
|
||||||
t18 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t14, t17);
|
|
||||||
t19 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t6, t18);
|
|
||||||
t1 = (t0 + 1672U);
|
|
||||||
t20 = *((char **)t1);
|
|
||||||
t21 = *((unsigned char *)t20);
|
|
||||||
t1 = (t0 + 1832U);
|
|
||||||
t22 = *((char **)t1);
|
|
||||||
t23 = *((unsigned char *)t22);
|
|
||||||
t24 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t23);
|
|
||||||
t25 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t21, t24);
|
|
||||||
t1 = (t0 + 2152U);
|
|
||||||
t26 = *((char **)t1);
|
|
||||||
t27 = *((unsigned char *)t26);
|
|
||||||
t28 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t25, t27);
|
|
||||||
t1 = (t0 + 2312U);
|
|
||||||
t29 = *((char **)t1);
|
|
||||||
t30 = *((unsigned char *)t29);
|
|
||||||
t31 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t28, t30);
|
|
||||||
t32 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t19, t31);
|
|
||||||
t1 = (t0 + 4520);
|
|
||||||
t33 = (t1 + 56U);
|
|
||||||
t34 = *((char **)t33);
|
|
||||||
t35 = (t34 + 56U);
|
|
||||||
t36 = *((char **)t35);
|
|
||||||
*((unsigned char *)t36) = t32;
|
|
||||||
xsi_driver_first_trans_fast_port(t1);
|
|
||||||
|
|
||||||
LAB2: t37 = (t0 + 4312);
|
|
||||||
*((int *)t37) = 1;
|
|
||||||
|
|
||||||
LAB1: return;
|
|
||||||
LAB4: goto LAB2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern void work_a_3914402253_2628201599_init()
|
|
||||||
{
|
|
||||||
static char *pe[] = {(void *)work_a_3914402253_2628201599_p_0,(void *)work_a_3914402253_2628201599_p_1,(void *)work_a_3914402253_2628201599_p_2};
|
|
||||||
xsi_register_didat("work_a_3914402253_2628201599", "isim/SpecialCasesCheck_isim_beh.exe.sim/work/a_3914402253_2628201599.didat");
|
|
||||||
xsi_register_executes(pe);
|
|
||||||
}
|
|
||||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
@@ -1,29 +0,0 @@
|
|||||||
Command line:
|
|
||||||
SpecialCasesTest_isim_beh.exe
|
|
||||||
-simmode gui
|
|
||||||
-simrunnum 0
|
|
||||||
-socket 52126
|
|
||||||
|
|
||||||
Sat Aug 24 14:59:56 2019
|
|
||||||
|
|
||||||
|
|
||||||
Elaboration Time: 0.01 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 195.359 Meg
|
|
||||||
|
|
||||||
Total Signals : 48
|
|
||||||
Total Nets : 239
|
|
||||||
Total Signal Drivers : 29
|
|
||||||
Total Blocks : 8
|
|
||||||
Total Primitive Blocks : 4
|
|
||||||
Total Processes : 26
|
|
||||||
Total Traceable Variables : 10
|
|
||||||
Total Scalar Nets and Variables : 601
|
|
||||||
Total Line Count : 143
|
|
||||||
|
|
||||||
Total Simulation Time: 0.03 sec
|
|
||||||
|
|
||||||
Current Memory Usage: 272.957 Meg
|
|
||||||
|
|
||||||
Sat Aug 24 15:00:02 2019
|
|
||||||
|
|
||||||
Binary file not shown.
Binary file not shown.
@@ -1,44 +0,0 @@
|
|||||||
/**********************************************************************/
|
|
||||||
/* ____ ____ */
|
|
||||||
/* / /\/ / */
|
|
||||||
/* /___/ \ / */
|
|
||||||
/* \ \ \/ */
|
|
||||||
/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
|
|
||||||
/* / / All Right Reserved. */
|
|
||||||
/* /---/ /\ */
|
|
||||||
/* \ \ / \ */
|
|
||||||
/* \___\/\___\ */
|
|
||||||
/***********************************************************************/
|
|
||||||
|
|
||||||
#include "xsi.h"
|
|
||||||
|
|
||||||
struct XSI_INFO xsi_info;
|
|
||||||
|
|
||||||
char *IEEE_P_2592010699;
|
|
||||||
char *STD_STANDARD;
|
|
||||||
|
|
||||||
|
|
||||||
int main(int argc, char **argv)
|
|
||||||
{
|
|
||||||
xsi_init_design(argc, argv);
|
|
||||||
xsi_register_info(&xsi_info);
|
|
||||||
|
|
||||||
xsi_register_min_prec_unit(-12);
|
|
||||||
ieee_p_2592010699_init();
|
|
||||||
work_a_0557987184_1272247069_init();
|
|
||||||
work_a_3914402253_2628201599_init();
|
|
||||||
work_a_2347761600_1146481140_init();
|
|
||||||
work_a_1540508602_4151211736_init();
|
|
||||||
work_a_2912948712_3395701438_init();
|
|
||||||
work_a_4189535622_2372691052_init();
|
|
||||||
|
|
||||||
|
|
||||||
xsi_register_tops("work_a_4189535622_2372691052");
|
|
||||||
|
|
||||||
IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699");
|
|
||||||
xsi_register_ieee_std_logic_1164(IEEE_P_2592010699);
|
|
||||||
STD_STANDARD = xsi_get_engine_memory("std_standard");
|
|
||||||
|
|
||||||
return xsi_run_simulation(argc, argv);
|
|
||||||
|
|
||||||
}
|
|
||||||
BIN
Binary file not shown.
Loaded 100 of 196 files, more files were not shown because too many files have changed in this diff.
Show more
Reference in new issue
Block a user