lucacuzzocrea/IEEE754Adder
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Fix normalizzatore + test

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This commit is contained in:
Luca Cuzzocrea
2019-09-10 20:54:06 +02:00
parent 3bc4d7a489
commit 371bd201ce
5 changed files with 72 additions and 44 deletions
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fuse.log
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@@ -32,8 +32,8 @@ Parsing VHDL file "/home/Luca/ISE/IEEE754Adder/IEEE754Adder.vhd" into library wo
Parsing VHDL file "/home/Luca/ISE/IEEE754Adder/IEEE754AdderTest.vhd" into library work
Starting static elaboration
Completed static elaboration
Fuse Memory Usage: 97552 KB
Fuse CPU Usage: 990 ms
Fuse Memory Usage: 97548 KB
Fuse CPU Usage: 950 ms
Compiling package standard
Compiling package std_logic_1164
Compiling architecture flipflopdvectorarch of entity FlipFlopDVector [\FlipFlopDVector(32)\]
@@ -72,9 +72,9 @@ Compiling architecture stagethreearch of entity PipelineStageThree [pipelinestag
Compiling architecture behavioral of entity IEEE754Adder [ieee754adder_default]
Compiling architecture behavior of entity ieee754addertest
Time Resolution for simulation is 1ps.
Waiting for 2 sub-compilation(s) to finish...
Waiting for 3 sub-compilation(s) to finish...
Compiled 68 VHDL Units
Built simulation executable /home/Luca/ISE/IEEE754Adder/IEEE754AdderTest_isim_beh.exe
Fuse Memory Usage: 671904 KB
Fuse CPU Usage: 1160 ms
GCC CPU Usage: 1140 ms
Fuse Memory Usage: 671896 KB
Fuse CPU Usage: 1120 ms
GCC CPU Usage: 1130 ms