SpecialCasesCheck Project Status (08/17/2019 - 16:41:04)
Project File: IEEE754Adder.xise Parser Errors: No Errors
Module Name: SpecialCasesCheck Implementation State: Synthesized
Target Device: xc3s50-5pq208
  • Errors:
 
Product Version:ISE 14.7
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentSat Aug 17 16:39:00 2019   
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 08/17/2019 - 16:41:04