| SpecialCasesCheck Project Status (08/17/2019 - 16:41:04) | |||
| Project File: | IEEE754Adder.xise | Parser Errors: | No Errors |
| Module Name: | SpecialCasesCheck | Implementation State: | Synthesized |
| Target Device: | xc3s50-5pq208 |
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| Product Version: | ISE 14.7 |
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| Design Goal: | Balanced |
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| Design Strategy: | Xilinx Default (unlocked) |
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| Environment: | System Settings |
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| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | Sat Aug 17 16:39:00 2019 | ||||
| Translation Report | ||||||
| Map Report | ||||||
| Place and Route Report | ||||||
| Power Report | ||||||
| Post-PAR Static Timing Report | ||||||
| Bitgen Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |