diff --git a/Comparator.vhd b/Comparator.vhd new file mode 100644 index 0000000..37e3688 --- /dev/null +++ b/Comparator.vhd @@ -0,0 +1,34 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; + + +entity Comparator is + generic( BITCOUNT: integer := 8 ); + port( + xT, yT: in std_logic_vector((BITCOUNT-1) downto 0); + needSwap: out std_logic + ); +end Comparator; + +architecture ComparatorArch of Comparator is + signal xGTy: std_logic_vector((BITCOUNT-1) downto 0); + signal yGTx: std_logic_vector((BITCOUNT-1) downto 0); +begin + xGTy <= xT and (not yT); + yGTx <= (not xT) and yT; + + needSwap_compute: process (xGTy, yGTx) + variable SW: std_logic; + variable K: std_logic; + begin + SW := '0'; + K := '1'; + for i in (BITCOUNT-1) downto 0 loop + SW := SW or ((not(xGTy(i)) and yGTx(i)) and K); + K := K and (not(xGTy(i) and not(yGTx(i)))); + end loop; + needSwap <= SW; + end process; + +end ComparatorArch; + diff --git a/ComparatorTest.vhd b/ComparatorTest.vhd new file mode 100644 index 0000000..78185cb --- /dev/null +++ b/ComparatorTest.vhd @@ -0,0 +1,65 @@ +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; + + +ENTITY ComparatorTest IS +END ComparatorTest; + +ARCHITECTURE behavior OF ComparatorTest IS + + -- Component Declaration for the Unit Under Test (UUT) + + COMPONENT Comparator + PORT( + xT : IN std_logic_vector(7 downto 0); + yT : IN std_logic_vector(7 downto 0); + needSwap : OUT std_logic + ); + END COMPONENT; + + + --Inputs + signal xT : std_logic_vector(7 downto 0) := "11111111"; + signal yT : std_logic_vector(7 downto 0) := "11111111"; + + --Outputs + signal needSwap : std_logic; + -- No clocks detected in port list. Replace clock below with + -- appropriate port name + signal clock: std_logic; + + constant clock_period : time := 10 ns; + +BEGIN + + -- Instantiate the Unit Under Test (UUT) + uut: Comparator PORT MAP ( + xT => xT, + yT => yT, + needSwap => needSwap + ); + + -- Clock process definitions + clock_process :process + begin + clock <= '0'; + wait for clock_period/2; + clock <= '1'; + wait for clock_period/2; + end process; + + + -- Stimulus process + stim_proc: process + begin + -- hold reset state for 100 ns. + wait for 100 ns; + + wait for clock_period*10; + + -- insert stimulus here + + wait; + end process; + +END; diff --git a/ComparatorTest_isim_beh.exe b/ComparatorTest_isim_beh.exe new file mode 100644 index 0000000..11ae4f7 Binary files /dev/null and b/ComparatorTest_isim_beh.exe differ diff --git a/FullAdder.vhd b/FullAdder.vhd new file mode 100644 index 0000000..a3dc49d --- /dev/null +++ b/FullAdder.vhd @@ -0,0 +1,18 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; + +entity FullAdder is + port( + X, Y, C_IN : in std_logic; + S, C_OUT : out std_logic + ); +end FullAdder; + +architecture FullAdderArch of FullAdder is + +begin + S <= C_IN xor X xor Y; + C_OUT <= (C_IN and X) or (C_IN and Y) or (X and Y); + +end FullAdderArch; + diff --git a/FullAdderTest.vhd b/FullAdderTest.vhd new file mode 100644 index 0000000..5d39dba --- /dev/null +++ b/FullAdderTest.vhd @@ -0,0 +1,97 @@ +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; + +-- Uncomment the following library declaration if using +-- arithmetic functions with Signed or Unsigned values +--USE ieee.numeric_std.ALL; + +ENTITY FullAdderTest IS +END FullAdderTest; + +ARCHITECTURE behavior OF FullAdderTest IS + + -- Component Declaration for the Unit Under Test (UUT) + + COMPONENT FullAdder + PORT( + X : IN std_logic; + Y : IN std_logic; + C_IN : IN std_logic; + S : OUT std_logic; + C_OUT : OUT std_logic + ); + END COMPONENT; + + + --Inputs + signal X : std_logic := '0'; + signal Y : std_logic := '0'; + signal C_IN : std_logic := '0'; + + --Outputs + signal S : std_logic; + signal C_OUT : std_logic; + signal clock : std_logic; + -- No clocks detected in port list. Replace clock below with + -- appropriate port name + + constant clock_period : time := 10 ns; + +BEGIN + + -- Instantiate the Unit Under Test (UUT) + uut: FullAdder PORT MAP ( + X => X, + Y => Y, + C_IN => C_IN, + S => S, + C_OUT => C_OUT + ); + + -- Clock process definitions + clock_process :process + begin + clock <= '0'; + wait for clock_period/2; + clock <= '1'; + wait for clock_period/2; + end process; + + + test_process :process + begin + X <= '0'; + Y <= '0'; + C_IN <= '0'; + wait for clock_period; + X <= '1'; + Y <= '0'; + C_IN <= '0'; + wait for clock_period; + X <= '0'; + Y <= '1'; + C_IN <= '0'; + wait for clock_period; + X <= '0'; + Y <= '0'; + C_IN <= '1'; + wait for clock_period; + X <= '1'; + Y <= '1'; + C_IN <= '0'; + wait for clock_period; + X <= '1'; + Y <= '0'; + C_IN <= '1'; + wait for clock_period; + X <= '0'; + Y <= '1'; + C_IN <= '1'; + wait for clock_period; + X <= '1'; + Y <= '1'; + C_IN <= '1'; + wait for clock_period; + end process; + +END; diff --git a/FullAdderTest_isim_beh.exe b/FullAdderTest_isim_beh.exe new file mode 100644 index 0000000..11ae4f7 Binary files /dev/null and b/FullAdderTest_isim_beh.exe differ diff --git a/FullAdderTest_isim_beh.wdb b/FullAdderTest_isim_beh.wdb new file mode 100644 index 0000000..128ca8c Binary files /dev/null and b/FullAdderTest_isim_beh.wdb differ diff --git a/IEEE754Adder.xise b/IEEE754Adder.xise index 3875e8b..79564a7 100644 --- a/IEEE754Adder.xise +++ b/IEEE754Adder.xise @@ -41,22 +41,47 @@ - - - - + - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + - - - + + + @@ -315,8 +340,8 @@ - - + + @@ -335,7 +360,7 @@ - + @@ -391,7 +416,7 @@ - + @@ -406,9 +431,7 @@ - - - + diff --git a/IEEE754Adder.xise~ b/IEEE754Adder.xise~ new file mode 100644 index 0000000..465dffa --- /dev/null +++ b/IEEE754Adder.xise~ @@ -0,0 +1,492 @@ + + + +
+ + + + + + + + +
+ + + + + + +<<<<<<< HEAD + + + + + + + + + + + + + + + + + +======= + + + + + + + + + + + + + + + + + +>>>>>>> 8b08af27823a5242424518ae45bac27cb9e28f6d + + + + + + + +<<<<<<< HEAD + + + + + + + + + + + + + + + + +======= + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>>>>>>> 8b08af27823a5242424518ae45bac27cb9e28f6d + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +<<<<<<< HEAD + +======= + +>>>>>>> 8b08af27823a5242424518ae45bac27cb9e28f6d + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/OperationCheck.vhd b/OperationCheck.vhd new file mode 100644 index 0000000..f002389 --- /dev/null +++ b/OperationCheck.vhd @@ -0,0 +1,18 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; + +entity OperationCheck is + port( + X_SIGN, Y_SIGN : in std_logic; + OP, RES_SIGN : out std_logic + ); +end OperationCheck; + +architecture OperationCheckArch of OperationCheck is + +begin + OP <= X_SIGN xor Y_SIGN; + RES_SIGN <= X_SIGN; + +end OperationCheckArch; + diff --git a/PrepareForShift.vhd b/PrepareForShift.vhd new file mode 100644 index 0000000..54a44ba --- /dev/null +++ b/PrepareForShift.vhd @@ -0,0 +1,42 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; + +entity PrepareForShift is + port( + X, Y: in std_logic_vector(31 downto 0); + DIFF_EXP: out std_logic_vector(8 downto 0); + SW: out std_logic + ); +end PrepareForShift; + +architecture PrepareForShiftArch of PrepareForShift is + signal LT: std_logic; + signal EQ: std_logic; + + component Comparator is + generic( BITCOUNT: integer := 8 ); + port( + xT, yT: in std_logic_vector((BITCOUNT-1) downto 0); + needSwap: out std_logic + ); + end component; + +begin + C: Comparator + port map (xT => X(22 downto 0), yT => Y(22 downto 0), needSwap => LT); + + --istaziare sommatore la cui uscita va mappata in X(31 downto 23), Y(31 downto 23), DIFF_EXP + + EQ <= '0'; + + O: process (DIFF_EXP) + begin + for i in 8 downto 0 loop + EQ <= EQ or DIFF_EXP(i); + end loop; + end process; + + SW <= DIFF_EXP(8) or (EQ and LT); + +end PrepareForShiftArch; + diff --git a/SpecialCasesTest_isim_beh.wdb b/SpecialCasesTest_isim_beh.wdb deleted file mode 100644 index 1ab10d0..0000000 Binary files a/SpecialCasesTest_isim_beh.wdb and /dev/null differ diff --git a/Swap.vhd b/Swap.vhd new file mode 100644 index 0000000..2320648 --- /dev/null +++ b/Swap.vhd @@ -0,0 +1,27 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; + +entity Swap is + generic(BITCOUNT : integer := 8); + port( + X_IN, Y_IN : in std_logic_vector((BITCOUNT-1) downto 0); + SW : in std_logic; + X_OUT, Y_OUT : out std_logic_vector((BITCOUNT-1) downto 0) + ); +end Swap; + +architecture SwapArch of Swap is + +begin + SWAP_PRO: process(X_IN, Y_IN, SW) + begin + for i in (BITCOUNT-1) downto 0 loop + + X_OUT(i) <= (not(SW) and X_IN(i)) or (SW and Y_IN(i)); + Y_OUT(i) <= (not(SW) and Y_IN(i)) or (SW and X_IN(i)); + + end loop; + end process; + +end SwapArch; + diff --git a/SwapTest.vhd b/SwapTest.vhd new file mode 100644 index 0000000..b369f4c --- /dev/null +++ b/SwapTest.vhd @@ -0,0 +1,74 @@ +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; + +-- Uncomment the following library declaration if using +-- arithmetic functions with Signed or Unsigned values +--USE ieee.numeric_std.ALL; + +ENTITY SwapTest IS +END SwapTest; + +ARCHITECTURE behavior OF SwapTest IS + + -- Component Declaration for the Unit Under Test (UUT) + + COMPONENT Swap + PORT( + X_IN : IN std_logic_vector(7 downto 0); + Y_IN : IN std_logic_vector(7 downto 0); + SW : IN std_logic; + X_OUT : OUT std_logic_vector(7 downto 0); + Y_OUT : OUT std_logic_vector(7 downto 0) + ); + END COMPONENT; + + + --Inputs + signal X_IN : std_logic_vector(7 downto 0) := "01010101"; + signal Y_IN : std_logic_vector(7 downto 0) := "10101010"; + signal SW : std_logic := '1'; + + --Outputs + signal X_OUT : std_logic_vector(7 downto 0); + signal Y_OUT : std_logic_vector(7 downto 0); + signal clock : std_logic; + -- No clocks detected in port list. Replace clock below with + -- appropriate port name + + constant clock_period : time := 10 ns; + +BEGIN + + -- Instantiate the Unit Under Test (UUT) + uut: Swap PORT MAP ( + X_IN => X_IN, + Y_IN => Y_IN, + SW => SW, + X_OUT => X_OUT, + Y_OUT => Y_OUT + ); + + -- Clock process definitions + clock_process :process + begin + clock <= '0'; + wait for clock_period/2; + clock <= '1'; + wait for clock_period/2; + end process; + + + -- Stimulus process + stim_proc: process + begin + -- hold reset state for 100 ns. + wait for 100 ns; + + wait for clock_period*10; + + -- insert stimulus here + + wait; + end process; + +END; diff --git a/SwapTest_isim_beh.exe b/SwapTest_isim_beh.exe new file mode 100644 index 0000000..11ae4f7 Binary files /dev/null and b/SwapTest_isim_beh.exe differ diff --git a/SwapTest_isim_beh.wdb b/SwapTest_isim_beh.wdb new file mode 100644 index 0000000..155220c Binary files /dev/null and b/SwapTest_isim_beh.wdb differ diff --git a/TwoComplement.vhd b/TwoComplement.vhd new file mode 100644 index 0000000..543bc1c --- /dev/null +++ b/TwoComplement.vhd @@ -0,0 +1,31 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; + +entity TwoComplement is + generic(BITCOUNT : integer := 8); + port( + DIFF_EXP_C2 : in std_logic_vector((BITCOUNT-1) downto 0); + DIFF_EXP_ABS : out std_logic_vector((BITCOUNT-2) downto 0); + ); +end TwoComplement; + +architecture TwoComplementArch of TwoComplement is + signal S : std_logic; + signal M : std_logic_vector((BITCOUNT-2) downto 0); +begin + S <= DIFF_EXP_C2(BITCOUNT-1); + M <= DIFF_EXP_C2((BITCOUNT-2) downto 0); + + C2 : process(DIFF_EXP_C2) + begin + for i in (BITCOUNT-2) downto 0 loop + M(i) <= S xor M(i); + end loop; + end process; + + --sommare 1 a M se S = '1' + + DIFF_EXP_ABS <= M; + +end TwoComplementArch; + diff --git a/TypeCheck_isim_beh.exe b/TypeCheck_isim_beh.exe new file mode 100644 index 0000000..11ae4f7 Binary files /dev/null and b/TypeCheck_isim_beh.exe differ diff --git a/equalCheck.vhd b/equalCheck.vhd index 137255e..15cd1ba 100644 --- a/equalCheck.vhd +++ b/equalCheck.vhd @@ -21,7 +21,7 @@ begin for i in compVec'range loop res_tmp := res_tmp or compVec(i); end loop; - isEqual <= res_tmp; + isEqual <= not res_tmp; end process; end EqualCheckArch; diff --git a/fuse.log b/fuse.log index 828586e..f57a166 100644 --- a/fuse.log +++ b/fuse.log @@ -1,22 +1,21 @@ -Running: /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/unwrapped/fuse -intstyle ise -incremental -lib secureip -o /home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.exe -prj /home/Luca/ISE/IEEE754Adder/AdderTest_beh.prj work.AdderTest -ISim P.20131013 (signature 0xfbc00daa) -Number of CPUs detected in this system: 4 -Turning on mult-threading, number of parallel sub-compilation jobs: 8 +Running: /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/unwrapped/fuse -relaunch -intstyle "ise" -incremental -lib "secureip" -o "/home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe" -prj "/home/ise/gianni/IEEE754Adder/FullAdderTest_beh.prj" "work.FullAdderTest" +ISim P.20160913 (signature 0xfbc00daa) +Number of CPUs detected in this system: 1 +Turning on mult-threading, number of parallel sub-compilation jobs: 0 Determining compilation order of HDL files -Parsing VHDL file "/home/Luca/ISE/IEEE754Adder/Adder.vhd" into library work -Parsing VHDL file "/home/Luca/ISE/IEEE754Adder/AdderTest.vhd" into library work +Parsing VHDL file "/home/ise/gianni/IEEE754Adder/FullAdder.vhd" into library work +Parsing VHDL file "/home/ise/gianni/IEEE754Adder/FullAdderTest.vhd" into library work Starting static elaboration Completed static elaboration -Fuse Memory Usage: 94252 KB -Fuse CPU Usage: 950 ms +Fuse Memory Usage: 95308 KB +Fuse CPU Usage: 2530 ms Compiling package standard Compiling package std_logic_1164 -Compiling architecture carrylookaheadarch of entity Adder [\Adder(8)\] -Compiling architecture behavior of entity addertest +Compiling architecture fulladderarch of entity FullAdder [fulladder_default] +Compiling architecture behavior of entity fulladdertest Time Resolution for simulation is 1ps. -Waiting for 1 sub-compilation(s) to finish... Compiled 5 VHDL Units -Built simulation executable /home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.exe -Fuse Memory Usage: 657936 KB -Fuse CPU Usage: 980 ms -GCC CPU Usage: 140 ms +Built simulation executable /home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe +Fuse Memory Usage: 103940 KB +Fuse CPU Usage: 2640 ms +GCC CPU Usage: 440 ms diff --git a/fuse.log~ b/fuse.log~ new file mode 100644 index 0000000..f89694f --- /dev/null +++ b/fuse.log~ @@ -0,0 +1,46 @@ +<<<<<<< HEAD +Running: /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/unwrapped/fuse -intstyle ise -incremental -lib secureip -o /home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.exe -prj /home/Luca/ISE/IEEE754Adder/AdderTest_beh.prj work.AdderTest +ISim P.20131013 (signature 0xfbc00daa) +Number of CPUs detected in this system: 4 +Turning on mult-threading, number of parallel sub-compilation jobs: 8 +Determining compilation order of HDL files +Parsing VHDL file "/home/Luca/ISE/IEEE754Adder/Adder.vhd" into library work +Parsing VHDL file "/home/Luca/ISE/IEEE754Adder/AdderTest.vhd" into library work +Starting static elaboration +Completed static elaboration +Fuse Memory Usage: 94252 KB +Fuse CPU Usage: 950 ms +Compiling package standard +Compiling package std_logic_1164 +Compiling architecture carrylookaheadarch of entity Adder [\Adder(8)\] +Compiling architecture behavior of entity addertest +Time Resolution for simulation is 1ps. +Waiting for 1 sub-compilation(s) to finish... +Compiled 5 VHDL Units +Built simulation executable /home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.exe +Fuse Memory Usage: 657936 KB +Fuse CPU Usage: 980 ms +GCC CPU Usage: 140 ms +======= +Running: /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/unwrapped/fuse -relaunch -intstyle "ise" -incremental -lib "secureip" -o "/home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe" -prj "/home/ise/gianni/IEEE754Adder/FullAdderTest_beh.prj" "work.FullAdderTest" +ISim P.20160913 (signature 0xfbc00daa) +Number of CPUs detected in this system: 1 +Turning on mult-threading, number of parallel sub-compilation jobs: 0 +Determining compilation order of HDL files +Parsing VHDL file "/home/ise/gianni/IEEE754Adder/FullAdder.vhd" into library work +Parsing VHDL file "/home/ise/gianni/IEEE754Adder/FullAdderTest.vhd" into library work +Starting static elaboration +Completed static elaboration +Fuse Memory Usage: 95308 KB +Fuse CPU Usage: 2530 ms +Compiling package standard +Compiling package std_logic_1164 +Compiling architecture fulladderarch of entity FullAdder [fulladder_default] +Compiling architecture behavior of entity fulladdertest +Time Resolution for simulation is 1ps. +Compiled 5 VHDL Units +Built simulation executable /home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe +Fuse Memory Usage: 103940 KB +Fuse CPU Usage: 2640 ms +GCC CPU Usage: 440 ms +>>>>>>> 8b08af27823a5242424518ae45bac27cb9e28f6d diff --git a/fuseRelaunch.cmd b/fuseRelaunch.cmd index 179c3a0..489428f 100644 --- a/fuseRelaunch.cmd +++ b/fuseRelaunch.cmd @@ -1 +1 @@ --intstyle "ise" -incremental -lib "secureip" -o "/home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.exe" -prj "/home/Luca/ISE/IEEE754Adder/AdderTest_beh.prj" "work.AdderTest" +-intstyle "ise" -incremental -lib "secureip" -o "/home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe" -prj "/home/ise/gianni/IEEE754Adder/FullAdderTest_beh.prj" "work.FullAdderTest" diff --git a/fuseRelaunch.cmd~ b/fuseRelaunch.cmd~ new file mode 100644 index 0000000..91a5ff6 --- /dev/null +++ b/fuseRelaunch.cmd~ @@ -0,0 +1,5 @@ +<<<<<<< HEAD +-intstyle "ise" -incremental -lib "secureip" -o "/home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.exe" -prj "/home/Luca/ISE/IEEE754Adder/AdderTest_beh.prj" "work.AdderTest" +======= +-intstyle "ise" -incremental -lib "secureip" -o "/home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe" -prj "/home/ise/gianni/IEEE754Adder/FullAdderTest_beh.prj" "work.FullAdderTest" +>>>>>>> 8b08af27823a5242424518ae45bac27cb9e28f6d diff --git a/isim.log b/isim.log index 622dd52..cabc714 100644 --- a/isim.log +++ b/isim.log @@ -1,14 +1,26 @@ ISim log file -Running: /home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb /home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.wdb -ISim P.20131013 (signature 0xfbc00daa) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. +Running: /home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb /home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.wdb +ISim P.20160913 (signature 0xfbc00daa) +---------------------------------------------------------------------- +WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases. + + +---------------------------------------------------------------------- +This is a Full version of ISim. Time resolution is 1 ps # onerror resume # wave add / # run 1000 ns Simulator is doing circuit initialization process. Finished circuit initialization process. +ISim P.20160913 (signature 0xfbc00daa) +---------------------------------------------------------------------- +WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases. + + +---------------------------------------------------------------------- +This is a Full version of ISim. +# run 1000 ns +Simulator is doing circuit initialization process. +Finished circuit initialization process. # exit 0 diff --git a/isim.log~ b/isim.log~ new file mode 100644 index 0000000..ccd0a23 --- /dev/null +++ b/isim.log~ @@ -0,0 +1,35 @@ +ISim log file +<<<<<<< HEAD +Running: /home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb /home/Luca/ISE/IEEE754Adder/AdderTest_isim_beh.wdb +ISim P.20131013 (signature 0xfbc00daa) +WARNING: A WEBPACK license was found. +WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. +WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. +This is a Lite version of ISim. +======= +Running: /home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb /home/ise/gianni/IEEE754Adder/FullAdderTest_isim_beh.wdb +ISim P.20160913 (signature 0xfbc00daa) +---------------------------------------------------------------------- +WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases. + + +---------------------------------------------------------------------- +This is a Full version of ISim. +>>>>>>> 8b08af27823a5242424518ae45bac27cb9e28f6d +Time resolution is 1 ps +# onerror resume +# wave add / +# run 1000 ns +Simulator is doing circuit initialization process. +Finished circuit initialization process. +ISim P.20160913 (signature 0xfbc00daa) +---------------------------------------------------------------------- +WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases. + + +---------------------------------------------------------------------- +This is a Full version of ISim. +# run 1000 ns +Simulator is doing circuit initialization process. +Finished circuit initialization process. +# exit 0 diff --git a/isim/ComparatorTest_isim_beh.exe.sim/ComparatorTest_isim_beh.exe b/isim/ComparatorTest_isim_beh.exe.sim/ComparatorTest_isim_beh.exe new file mode 100644 index 0000000..caf9c4a Binary files /dev/null and b/isim/ComparatorTest_isim_beh.exe.sim/ComparatorTest_isim_beh.exe differ diff --git a/isim/ComparatorTest_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg b/isim/ComparatorTest_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg new file mode 100644 index 0000000..6d2714f Binary files /dev/null and b/isim/ComparatorTest_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg differ diff --git a/isim/ComparatorTest_isim_beh.exe.sim/isimcrash.log b/isim/ComparatorTest_isim_beh.exe.sim/isimcrash.log new file mode 100644 index 0000000..e69de29 diff --git a/isim/ComparatorTest_isim_beh.exe.sim/isimkernel.log b/isim/ComparatorTest_isim_beh.exe.sim/isimkernel.log new file mode 100644 index 0000000..626b56f --- /dev/null +++ b/isim/ComparatorTest_isim_beh.exe.sim/isimkernel.log @@ -0,0 +1,28 @@ +Command line: + ComparatorTest_isim_beh.exe + -simmode gui + -simrunnum 0 + -socket 40809 + +Tue Aug 27 09:47:36 2019 + + + Elaboration Time: 0.12 sec + + Current Memory Usage: 198.607 Meg + + Total Signals : 9 + Total Nets : 34 + Total Signal Drivers : 4 + Total Blocks : 3 + Total Primitive Blocks : 2 + Total Processes : 5 + Total Traceable Variables : 10 + Total Scalar Nets and Variables : 396 + + Total Simulation Time: 0.13 sec + + Current Memory Usage: 276.206 Meg + +Tue Aug 27 09:47:41 2019 + diff --git a/isim/ComparatorTest_isim_beh.exe.sim/netId.dat b/isim/ComparatorTest_isim_beh.exe.sim/netId.dat new file mode 100644 index 0000000..7e9a792 Binary files /dev/null and b/isim/ComparatorTest_isim_beh.exe.sim/netId.dat differ diff --git a/isim/ComparatorTest_isim_beh.exe.sim/tmp_save/_1 b/isim/ComparatorTest_isim_beh.exe.sim/tmp_save/_1 new file mode 100644 index 0000000..0d504ae Binary files /dev/null and b/isim/ComparatorTest_isim_beh.exe.sim/tmp_save/_1 differ diff --git a/isim/ComparatorTest_isim_beh.exe.sim/work/ComparatorTest_isim_beh.exe_main.c b/isim/ComparatorTest_isim_beh.exe.sim/work/ComparatorTest_isim_beh.exe_main.c new file mode 100644 index 0000000..63a70f6 --- /dev/null +++ b/isim/ComparatorTest_isim_beh.exe.sim/work/ComparatorTest_isim_beh.exe_main.c @@ -0,0 +1,40 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +#include "xsi.h" + +struct XSI_INFO xsi_info; + +char *IEEE_P_2592010699; +char *STD_STANDARD; + + +int main(int argc, char **argv) +{ + xsi_init_design(argc, argv); + xsi_register_info(&xsi_info); + + xsi_register_min_prec_unit(-12); + ieee_p_2592010699_init(); + work_a_0883098610_0495709306_init(); + work_a_1038528572_2372691052_init(); + + + xsi_register_tops("work_a_1038528572_2372691052"); + + IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699"); + xsi_register_ieee_std_logic_1164(IEEE_P_2592010699); + STD_STANDARD = xsi_get_engine_memory("std_standard"); + + return xsi_run_simulation(argc, argv); + +} diff --git a/isim/ComparatorTest_isim_beh.exe.sim/work/ComparatorTest_isim_beh.exe_main.lin64.o b/isim/ComparatorTest_isim_beh.exe.sim/work/ComparatorTest_isim_beh.exe_main.lin64.o new file mode 100644 index 0000000..4ec6a81 Binary files /dev/null and b/isim/ComparatorTest_isim_beh.exe.sim/work/ComparatorTest_isim_beh.exe_main.lin64.o differ diff --git a/isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.c b/isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.c new file mode 100644 index 0000000..385e92b --- /dev/null +++ b/isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.c @@ -0,0 +1,314 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/Comparator.vhd"; +extern char *IEEE_P_2592010699; + +char *ieee_p_2592010699_sub_16439989832805790689_503743352(char *, char *, char *, char *, char *, char *); +char *ieee_p_2592010699_sub_207919886985903570_503743352(char *, char *, char *, char *); +unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char ); + + +static void work_a_0883098610_0495709306_p_0(char *t0) +{ + char t1[16]; + char t4[16]; + char *t2; + char *t3; + char *t5; + char *t6; + char *t7; + char *t8; + char *t9; + unsigned int t10; + unsigned int t11; + unsigned char t12; + char *t13; + char *t14; + char *t15; + char *t16; + char *t17; + char *t18; + +LAB0: xsi_set_current_line(17, ng0); + +LAB3: t2 = (t0 + 1032U); + t3 = *((char **)t2); + t2 = (t0 + 6144U); + t5 = (t0 + 1192U); + t6 = *((char **)t5); + t5 = (t0 + 6160U); + t7 = ieee_p_2592010699_sub_207919886985903570_503743352(IEEE_P_2592010699, t4, t6, t5); + t8 = ieee_p_2592010699_sub_16439989832805790689_503743352(IEEE_P_2592010699, t1, t3, t2, t7, t4); + t9 = (t1 + 12U); + t10 = *((unsigned int *)t9); + t11 = (1U * t10); + t12 = (8U != t11); + if (t12 == 1) + goto LAB5; + +LAB6: t13 = (t0 + 4112); + t14 = (t13 + 56U); + t15 = *((char **)t14); + t16 = (t15 + 56U); + t17 = *((char **)t16); + memcpy(t17, t8, 8U); + xsi_driver_first_trans_fast(t13); + +LAB2: t18 = (t0 + 4000); + *((int *)t18) = 1; + +LAB1: return; +LAB4: goto LAB2; + +LAB5: xsi_size_not_matching(8U, t11, 0); + goto LAB6; + +} + +static void work_a_0883098610_0495709306_p_1(char *t0) +{ + char t1[16]; + char t2[16]; + char *t3; + char *t4; + char *t5; + char *t6; + char *t7; + char *t8; + char *t9; + unsigned int t10; + unsigned int t11; + unsigned char t12; + char *t13; + char *t14; + char *t15; + char *t16; + char *t17; + char *t18; + +LAB0: xsi_set_current_line(18, ng0); + +LAB3: t3 = (t0 + 1032U); + t4 = *((char **)t3); + t3 = (t0 + 6144U); + t5 = ieee_p_2592010699_sub_207919886985903570_503743352(IEEE_P_2592010699, t2, t4, t3); + t6 = (t0 + 1192U); + t7 = *((char **)t6); + t6 = (t0 + 6160U); + t8 = ieee_p_2592010699_sub_16439989832805790689_503743352(IEEE_P_2592010699, t1, t5, t2, t7, t6); + t9 = (t1 + 12U); + t10 = *((unsigned int *)t9); + t11 = (1U * t10); + t12 = (8U != t11); + if (t12 == 1) + goto LAB5; + +LAB6: t13 = (t0 + 4176); + t14 = (t13 + 56U); + t15 = *((char **)t14); + t16 = (t15 + 56U); + t17 = *((char **)t16); + memcpy(t17, t8, 8U); + xsi_driver_first_trans_fast(t13); + +LAB2: t18 = (t0 + 4016); + *((int *)t18) = 1; + +LAB1: return; +LAB4: goto LAB2; + +LAB5: xsi_size_not_matching(8U, t11, 0); + goto LAB6; + +} + +static void work_a_0883098610_0495709306_p_2(char *t0) +{ + char *t1; + char *t2; + int t3; + int t4; + int t5; + char *t6; + char *t7; + unsigned char t8; + char *t9; + int t10; + int t11; + unsigned int t12; + unsigned int t13; + unsigned int t14; + char *t15; + unsigned char t16; + unsigned char t17; + char *t18; + char *t19; + int t20; + int t21; + unsigned int t22; + unsigned int t23; + unsigned int t24; + char *t25; + unsigned char t26; + unsigned char t27; + char *t28; + char *t29; + unsigned char t30; + unsigned char t31; + unsigned char t32; + char *t33; + +LAB0: xsi_set_current_line(24, ng0); + t1 = (t0 + 2088U); + t2 = *((char **)t1); + t1 = (t2 + 0); + *((unsigned char *)t1) = (unsigned char)2; + xsi_set_current_line(25, ng0); + t1 = (t0 + 2208U); + t2 = *((char **)t1); + t1 = (t2 + 0); + *((unsigned char *)t1) = (unsigned char)3; + xsi_set_current_line(26, ng0); + t3 = (8 - 1); + t1 = (t0 + 6254); + *((int *)t1) = t3; + t2 = (t0 + 6258); + *((int *)t2) = 0; + t4 = t3; + t5 = 0; + +LAB2: if (t4 >= t5) + goto LAB3; + +LAB5: xsi_set_current_line(30, ng0); + t1 = (t0 + 2088U); + t2 = *((char **)t1); + t8 = *((unsigned char *)t2); + t1 = (t0 + 4240); + t6 = (t1 + 56U); + t7 = *((char **)t6); + t9 = (t7 + 56U); + t15 = *((char **)t9); + *((unsigned char *)t15) = t8; + xsi_driver_first_trans_fast_port(t1); + t1 = (t0 + 4032); + *((int *)t1) = 1; + +LAB1: return; +LAB3: xsi_set_current_line(27, ng0); + t6 = (t0 + 2088U); + t7 = *((char **)t6); + t8 = *((unsigned char *)t7); + t6 = (t0 + 1512U); + t9 = *((char **)t6); + t6 = (t0 + 6254); + t10 = *((int *)t6); + t11 = (t10 - 7); + t12 = (t11 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t6)); + t13 = (1U * t12); + t14 = (0 + t13); + t15 = (t9 + t14); + t16 = *((unsigned char *)t15); + t17 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t16); + t18 = (t0 + 1672U); + t19 = *((char **)t18); + t18 = (t0 + 6254); + t20 = *((int *)t18); + t21 = (t20 - 7); + t22 = (t21 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t18)); + t23 = (1U * t22); + t24 = (0 + t23); + t25 = (t19 + t24); + t26 = *((unsigned char *)t25); + t27 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t17, t26); + t28 = (t0 + 2208U); + t29 = *((char **)t28); + t30 = *((unsigned char *)t29); + t31 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t27, t30); + t32 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t8, t31); + t28 = (t0 + 2088U); + t33 = *((char **)t28); + t28 = (t33 + 0); + *((unsigned char *)t28) = t32; + xsi_set_current_line(28, ng0); + t1 = (t0 + 2208U); + t2 = *((char **)t1); + t8 = *((unsigned char *)t2); + t1 = (t0 + 1512U); + t6 = *((char **)t1); + t1 = (t0 + 6254); + t3 = *((int *)t1); + t10 = (t3 - 7); + t12 = (t10 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t1)); + t13 = (1U * t12); + t14 = (0 + t13); + t7 = (t6 + t14); + t16 = *((unsigned char *)t7); + t9 = (t0 + 1672U); + t15 = *((char **)t9); + t9 = (t0 + 6254); + t11 = *((int *)t9); + t20 = (t11 - 7); + t22 = (t20 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t9)); + t23 = (1U * t22); + t24 = (0 + t23); + t18 = (t15 + t24); + t17 = *((unsigned char *)t18); + t26 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t17); + t27 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t16, t26); + t30 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t27); + t31 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t8, t30); + t19 = (t0 + 2208U); + t25 = *((char **)t19); + t19 = (t25 + 0); + *((unsigned char *)t19) = t31; + +LAB4: t1 = (t0 + 6254); + t4 = *((int *)t1); + t2 = (t0 + 6258); + t5 = *((int *)t2); + if (t4 == t5) + goto LAB5; + +LAB6: t3 = (t4 + -1); + t4 = t3; + t6 = (t0 + 6254); + *((int *)t6) = t4; + goto LAB2; + +} + + +extern void work_a_0883098610_0495709306_init() +{ + static char *pe[] = {(void *)work_a_0883098610_0495709306_p_0,(void *)work_a_0883098610_0495709306_p_1,(void *)work_a_0883098610_0495709306_p_2}; + xsi_register_didat("work_a_0883098610_0495709306", "isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.didat"); + xsi_register_executes(pe); +} diff --git a/isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.didat b/isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.didat new file mode 100644 index 0000000..c3aeaac Binary files /dev/null and b/isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.didat differ diff --git a/isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.lin64.o b/isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.lin64.o new file mode 100644 index 0000000..a84c764 Binary files /dev/null and b/isim/ComparatorTest_isim_beh.exe.sim/work/a_0883098610_0495709306.lin64.o differ diff --git a/isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.c b/isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.c new file mode 100644 index 0000000..77dc387 --- /dev/null +++ b/isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.c @@ -0,0 +1,157 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/ComparatorTest.vhd"; + + + +static void work_a_1038528572_2372691052_p_0(char *t0) +{ + char *t1; + char *t2; + char *t3; + char *t4; + char *t5; + char *t6; + int64 t7; + int64 t8; + +LAB0: t1 = (t0 + 2784U); + t2 = *((char **)t1); + if (t2 == 0) + goto LAB2; + +LAB3: goto *t2; + +LAB2: xsi_set_current_line(45, ng0); + t2 = (t0 + 3416); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(46, ng0); + t2 = (t0 + 1808U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t8 = (t7 / 2); + t2 = (t0 + 2592); + xsi_process_wait(t2, t8); + +LAB6: *((char **)t1) = &&LAB7; + +LAB1: return; +LAB4: xsi_set_current_line(47, ng0); + t2 = (t0 + 3416); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(48, ng0); + t2 = (t0 + 1808U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t8 = (t7 / 2); + t2 = (t0 + 2592); + xsi_process_wait(t2, t8); + +LAB10: *((char **)t1) = &&LAB11; + goto LAB1; + +LAB5: goto LAB4; + +LAB7: goto LAB5; + +LAB8: goto LAB2; + +LAB9: goto LAB8; + +LAB11: goto LAB9; + +} + +static void work_a_1038528572_2372691052_p_1(char *t0) +{ + char *t1; + char *t2; + int64 t3; + char *t4; + int64 t5; + +LAB0: t1 = (t0 + 3032U); + t2 = *((char **)t1); + if (t2 == 0) + goto LAB2; + +LAB3: goto *t2; + +LAB2: xsi_set_current_line(56, ng0); + t3 = (100 * 1000LL); + t2 = (t0 + 2840); + xsi_process_wait(t2, t3); + +LAB6: *((char **)t1) = &&LAB7; + +LAB1: return; +LAB4: xsi_set_current_line(58, ng0); + t2 = (t0 + 1808U); + t4 = *((char **)t2); + t3 = *((int64 *)t4); + t5 = (t3 * 10); + t2 = (t0 + 2840); + xsi_process_wait(t2, t5); + +LAB10: *((char **)t1) = &&LAB11; + goto LAB1; + +LAB5: goto LAB4; + +LAB7: goto LAB5; + +LAB8: xsi_set_current_line(62, ng0); + +LAB14: *((char **)t1) = &&LAB15; + goto LAB1; + +LAB9: goto LAB8; + +LAB11: goto LAB9; + +LAB12: goto LAB2; + +LAB13: goto LAB12; + +LAB15: goto LAB13; + +} + + +extern void work_a_1038528572_2372691052_init() +{ + static char *pe[] = {(void *)work_a_1038528572_2372691052_p_0,(void *)work_a_1038528572_2372691052_p_1}; + xsi_register_didat("work_a_1038528572_2372691052", "isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.didat"); + xsi_register_executes(pe); +} diff --git a/isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.didat b/isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.didat new file mode 100644 index 0000000..10e428c Binary files /dev/null and b/isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.didat differ diff --git a/isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.lin64.o b/isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.lin64.o new file mode 100644 index 0000000..c936347 Binary files /dev/null and b/isim/ComparatorTest_isim_beh.exe.sim/work/a_1038528572_2372691052.lin64.o differ diff --git a/isim/FullAdderTest_isim_beh.exe.sim/FullAdderTest_isim_beh.exe b/isim/FullAdderTest_isim_beh.exe.sim/FullAdderTest_isim_beh.exe new file mode 100644 index 0000000..c722895 Binary files /dev/null and b/isim/FullAdderTest_isim_beh.exe.sim/FullAdderTest_isim_beh.exe differ diff --git a/isim/FullAdderTest_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg b/isim/FullAdderTest_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg new file mode 100644 index 0000000..1f5a984 Binary files /dev/null and b/isim/FullAdderTest_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg differ diff --git a/isim/FullAdderTest_isim_beh.exe.sim/isimcrash.log b/isim/FullAdderTest_isim_beh.exe.sim/isimcrash.log new file mode 100644 index 0000000..e69de29 diff --git a/isim/FullAdderTest_isim_beh.exe.sim/isimkernel.log b/isim/FullAdderTest_isim_beh.exe.sim/isimkernel.log new file mode 100644 index 0000000..0832383 --- /dev/null +++ b/isim/FullAdderTest_isim_beh.exe.sim/isimkernel.log @@ -0,0 +1,28 @@ +Command line: + FullAdderTest_isim_beh.exe + -simmode gui + -simrunnum 0 + -socket 51967 + +Tue Aug 27 15:05:31 2019 + + + Elaboration Time: 0.11 sec + + Current Memory Usage: 198.607 Meg + + Total Signals : 11 + Total Nets : 6 + Total Signal Drivers : 6 + Total Blocks : 3 + Total Primitive Blocks : 2 + Total Processes : 4 + Total Traceable Variables : 9 + Total Scalar Nets and Variables : 367 + + Total Simulation Time: 0.15 sec + + Current Memory Usage: 276.206 Meg + +Tue Aug 27 15:08:11 2019 + diff --git a/isim/FullAdderTest_isim_beh.exe.sim/netId.dat b/isim/FullAdderTest_isim_beh.exe.sim/netId.dat new file mode 100644 index 0000000..0ad1d5f Binary files /dev/null and b/isim/FullAdderTest_isim_beh.exe.sim/netId.dat differ diff --git a/isim/FullAdderTest_isim_beh.exe.sim/tmp_save/_1 b/isim/FullAdderTest_isim_beh.exe.sim/tmp_save/_1 new file mode 100644 index 0000000..9a8e736 Binary files /dev/null and b/isim/FullAdderTest_isim_beh.exe.sim/tmp_save/_1 differ diff --git a/isim/FullAdderTest_isim_beh.exe.sim/work/FullAdderTest_isim_beh.exe_main.c b/isim/FullAdderTest_isim_beh.exe.sim/work/FullAdderTest_isim_beh.exe_main.c new file mode 100644 index 0000000..ae6b199 --- /dev/null +++ b/isim/FullAdderTest_isim_beh.exe.sim/work/FullAdderTest_isim_beh.exe_main.c @@ -0,0 +1,40 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +#include "xsi.h" + +struct XSI_INFO xsi_info; + +char *IEEE_P_2592010699; +char *STD_STANDARD; + + +int main(int argc, char **argv) +{ + xsi_init_design(argc, argv); + xsi_register_info(&xsi_info); + + xsi_register_min_prec_unit(-12); + ieee_p_2592010699_init(); + work_a_1130988942_2801528920_init(); + work_a_2258021406_2372691052_init(); + + + xsi_register_tops("work_a_2258021406_2372691052"); + + IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699"); + xsi_register_ieee_std_logic_1164(IEEE_P_2592010699); + STD_STANDARD = xsi_get_engine_memory("std_standard"); + + return xsi_run_simulation(argc, argv); + +} diff --git a/isim/FullAdderTest_isim_beh.exe.sim/work/FullAdderTest_isim_beh.exe_main.lin64.o b/isim/FullAdderTest_isim_beh.exe.sim/work/FullAdderTest_isim_beh.exe_main.lin64.o new file mode 100644 index 0000000..3c2c910 Binary files /dev/null and b/isim/FullAdderTest_isim_beh.exe.sim/work/FullAdderTest_isim_beh.exe_main.lin64.o differ diff --git a/isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.c b/isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.c new file mode 100644 index 0000000..7e57773 --- /dev/null +++ b/isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.c @@ -0,0 +1,151 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/FullAdder.vhd"; +extern char *IEEE_P_2592010699; + +unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_3488768497506413324_503743352(char *, unsigned char , unsigned char ); + + +static void work_a_1130988942_2801528920_p_0(char *t0) +{ + char *t1; + char *t2; + unsigned char t3; + char *t4; + unsigned char t5; + unsigned char t6; + char *t7; + unsigned char t8; + unsigned char t9; + char *t10; + char *t11; + char *t12; + char *t13; + char *t14; + +LAB0: xsi_set_current_line(14, ng0); + +LAB3: t1 = (t0 + 1352U); + t2 = *((char **)t1); + t3 = *((unsigned char *)t2); + t1 = (t0 + 1032U); + t4 = *((char **)t1); + t5 = *((unsigned char *)t4); + t6 = ieee_p_2592010699_sub_3488768497506413324_503743352(IEEE_P_2592010699, t3, t5); + t1 = (t0 + 1192U); + t7 = *((char **)t1); + t8 = *((unsigned char *)t7); + t9 = ieee_p_2592010699_sub_3488768497506413324_503743352(IEEE_P_2592010699, t6, t8); + t1 = (t0 + 3488); + t10 = (t1 + 56U); + t11 = *((char **)t10); + t12 = (t11 + 56U); + t13 = *((char **)t12); + *((unsigned char *)t13) = t9; + xsi_driver_first_trans_fast_port(t1); + +LAB2: t14 = (t0 + 3392); + *((int *)t14) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + +static void work_a_1130988942_2801528920_p_1(char *t0) +{ + char *t1; + char *t2; + unsigned char t3; + char *t4; + unsigned char t5; + unsigned char t6; + char *t7; + unsigned char t8; + char *t9; + unsigned char t10; + unsigned char t11; + unsigned char t12; + char *t13; + unsigned char t14; + char *t15; + unsigned char t16; + unsigned char t17; + unsigned char t18; + char *t19; + char *t20; + char *t21; + char *t22; + char *t23; + +LAB0: xsi_set_current_line(15, ng0); + +LAB3: t1 = (t0 + 1352U); + t2 = *((char **)t1); + t3 = *((unsigned char *)t2); + t1 = (t0 + 1032U); + t4 = *((char **)t1); + t5 = *((unsigned char *)t4); + t6 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t3, t5); + t1 = (t0 + 1352U); + t7 = *((char **)t1); + t8 = *((unsigned char *)t7); + t1 = (t0 + 1192U); + t9 = *((char **)t1); + t10 = *((unsigned char *)t9); + t11 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t8, t10); + t12 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t6, t11); + t1 = (t0 + 1032U); + t13 = *((char **)t1); + t14 = *((unsigned char *)t13); + t1 = (t0 + 1192U); + t15 = *((char **)t1); + t16 = *((unsigned char *)t15); + t17 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t14, t16); + t18 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t12, t17); + t1 = (t0 + 3552); + t19 = (t1 + 56U); + t20 = *((char **)t19); + t21 = (t20 + 56U); + t22 = *((char **)t21); + *((unsigned char *)t22) = t18; + xsi_driver_first_trans_fast_port(t1); + +LAB2: t23 = (t0 + 3408); + *((int *)t23) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + + +extern void work_a_1130988942_2801528920_init() +{ + static char *pe[] = {(void *)work_a_1130988942_2801528920_p_0,(void *)work_a_1130988942_2801528920_p_1}; + xsi_register_didat("work_a_1130988942_2801528920", "isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.didat"); + xsi_register_executes(pe); +} diff --git a/isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.didat b/isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.didat new file mode 100644 index 0000000..e695974 Binary files /dev/null and b/isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.didat differ diff --git a/isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.lin64.o b/isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.lin64.o new file mode 100644 index 0000000..4afcf1b Binary files /dev/null and b/isim/FullAdderTest_isim_beh.exe.sim/work/a_1130988942_2801528920.lin64.o differ diff --git a/isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.c b/isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.c new file mode 100644 index 0000000..1c67586 --- /dev/null +++ b/isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.c @@ -0,0 +1,427 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/FullAdderTest.vhd"; + + + +static void work_a_2258021406_2372691052_p_0(char *t0) +{ + char *t1; + char *t2; + char *t3; + char *t4; + char *t5; + char *t6; + int64 t7; + int64 t8; + +LAB0: t1 = (t0 + 3104U); + t2 = *((char **)t1); + if (t2 == 0) + goto LAB2; + +LAB3: goto *t2; + +LAB2: xsi_set_current_line(54, ng0); + t2 = (t0 + 3736); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(55, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t8 = (t7 / 2); + t2 = (t0 + 2912); + xsi_process_wait(t2, t8); + +LAB6: *((char **)t1) = &&LAB7; + +LAB1: return; +LAB4: xsi_set_current_line(56, ng0); + t2 = (t0 + 3736); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(57, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t8 = (t7 / 2); + t2 = (t0 + 2912); + xsi_process_wait(t2, t8); + +LAB10: *((char **)t1) = &&LAB11; + goto LAB1; + +LAB5: goto LAB4; + +LAB7: goto LAB5; + +LAB8: goto LAB2; + +LAB9: goto LAB8; + +LAB11: goto LAB9; + +} + +static void work_a_2258021406_2372691052_p_1(char *t0) +{ + char *t1; + char *t2; + char *t3; + char *t4; + char *t5; + char *t6; + int64 t7; + +LAB0: t1 = (t0 + 3352U); + t2 = *((char **)t1); + if (t2 == 0) + goto LAB2; + +LAB3: goto *t2; + +LAB2: xsi_set_current_line(63, ng0); + t2 = (t0 + 3800); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(64, ng0); + t2 = (t0 + 3864); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(65, ng0); + t2 = (t0 + 3928); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(66, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t2 = (t0 + 3160); + xsi_process_wait(t2, t7); + +LAB6: *((char **)t1) = &&LAB7; + +LAB1: return; +LAB4: xsi_set_current_line(67, ng0); + t2 = (t0 + 3800); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(68, ng0); + t2 = (t0 + 3864); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(69, ng0); + t2 = (t0 + 3928); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(70, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t2 = (t0 + 3160); + xsi_process_wait(t2, t7); + +LAB10: *((char **)t1) = &&LAB11; + goto LAB1; + +LAB5: goto LAB4; + +LAB7: goto LAB5; + +LAB8: xsi_set_current_line(71, ng0); + t2 = (t0 + 3800); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(72, ng0); + t2 = (t0 + 3864); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(73, ng0); + t2 = (t0 + 3928); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(74, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t2 = (t0 + 3160); + xsi_process_wait(t2, t7); + +LAB14: *((char **)t1) = &&LAB15; + goto LAB1; + +LAB9: goto LAB8; + +LAB11: goto LAB9; + +LAB12: xsi_set_current_line(75, ng0); + t2 = (t0 + 3800); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(76, ng0); + t2 = (t0 + 3864); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(77, ng0); + t2 = (t0 + 3928); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(78, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t2 = (t0 + 3160); + xsi_process_wait(t2, t7); + +LAB18: *((char **)t1) = &&LAB19; + goto LAB1; + +LAB13: goto LAB12; + +LAB15: goto LAB13; + +LAB16: xsi_set_current_line(79, ng0); + t2 = (t0 + 3800); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(80, ng0); + t2 = (t0 + 3864); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(81, ng0); + t2 = (t0 + 3928); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(82, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t2 = (t0 + 3160); + xsi_process_wait(t2, t7); + +LAB22: *((char **)t1) = &&LAB23; + goto LAB1; + +LAB17: goto LAB16; + +LAB19: goto LAB17; + +LAB20: xsi_set_current_line(83, ng0); + t2 = (t0 + 3800); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(84, ng0); + t2 = (t0 + 3864); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(85, ng0); + t2 = (t0 + 3928); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(86, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t2 = (t0 + 3160); + xsi_process_wait(t2, t7); + +LAB26: *((char **)t1) = &&LAB27; + goto LAB1; + +LAB21: goto LAB20; + +LAB23: goto LAB21; + +LAB24: xsi_set_current_line(87, ng0); + t2 = (t0 + 3800); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(88, ng0); + t2 = (t0 + 3864); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(89, ng0); + t2 = (t0 + 3928); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(90, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t2 = (t0 + 3160); + xsi_process_wait(t2, t7); + +LAB30: *((char **)t1) = &&LAB31; + goto LAB1; + +LAB25: goto LAB24; + +LAB27: goto LAB25; + +LAB28: xsi_set_current_line(91, ng0); + t2 = (t0 + 3800); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(92, ng0); + t2 = (t0 + 3864); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(93, ng0); + t2 = (t0 + 3928); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(94, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t2 = (t0 + 3160); + xsi_process_wait(t2, t7); + +LAB34: *((char **)t1) = &&LAB35; + goto LAB1; + +LAB29: goto LAB28; + +LAB31: goto LAB29; + +LAB32: goto LAB2; + +LAB33: goto LAB32; + +LAB35: goto LAB33; + +} + + +extern void work_a_2258021406_2372691052_init() +{ + static char *pe[] = {(void *)work_a_2258021406_2372691052_p_0,(void *)work_a_2258021406_2372691052_p_1}; + xsi_register_didat("work_a_2258021406_2372691052", "isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.didat"); + xsi_register_executes(pe); +} diff --git a/isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.didat b/isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.didat new file mode 100644 index 0000000..5aaad93 Binary files /dev/null and b/isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.didat differ diff --git a/isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.lin64.o b/isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.lin64.o new file mode 100644 index 0000000..abcba90 Binary files /dev/null and b/isim/FullAdderTest_isim_beh.exe.sim/work/a_2258021406_2372691052.lin64.o differ diff --git a/isim/SwapTest_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg b/isim/SwapTest_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg new file mode 100644 index 0000000..1a31121 Binary files /dev/null and b/isim/SwapTest_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg differ diff --git a/isim/SwapTest_isim_beh.exe.sim/SwapTest_isim_beh.exe b/isim/SwapTest_isim_beh.exe.sim/SwapTest_isim_beh.exe new file mode 100644 index 0000000..aacfd9e Binary files /dev/null and b/isim/SwapTest_isim_beh.exe.sim/SwapTest_isim_beh.exe differ diff --git a/isim/SwapTest_isim_beh.exe.sim/isimcrash.log b/isim/SwapTest_isim_beh.exe.sim/isimcrash.log new file mode 100644 index 0000000..e69de29 diff --git a/isim/SwapTest_isim_beh.exe.sim/isimkernel.log b/isim/SwapTest_isim_beh.exe.sim/isimkernel.log new file mode 100644 index 0000000..67d1e0d --- /dev/null +++ b/isim/SwapTest_isim_beh.exe.sim/isimkernel.log @@ -0,0 +1,28 @@ +Command line: + SwapTest_isim_beh.exe + -simmode gui + -simrunnum 0 + -socket 45337 + +Tue Aug 27 12:56:25 2019 + + + Elaboration Time: 0.09 sec + + Current Memory Usage: 198.603 Meg + + Total Signals : 11 + Total Nets : 34 + Total Signal Drivers : 3 + Total Blocks : 3 + Total Primitive Blocks : 2 + Total Processes : 3 + Total Traceable Variables : 10 + Total Scalar Nets and Variables : 396 + + Total Simulation Time: 0.11 sec + + Current Memory Usage: 276.201 Meg + +Tue Aug 27 12:56:46 2019 + diff --git a/isim/SwapTest_isim_beh.exe.sim/netId.dat b/isim/SwapTest_isim_beh.exe.sim/netId.dat new file mode 100644 index 0000000..374c0d8 Binary files /dev/null and b/isim/SwapTest_isim_beh.exe.sim/netId.dat differ diff --git a/isim/SwapTest_isim_beh.exe.sim/tmp_save/_1 b/isim/SwapTest_isim_beh.exe.sim/tmp_save/_1 new file mode 100644 index 0000000..d3a7c09 Binary files /dev/null and b/isim/SwapTest_isim_beh.exe.sim/tmp_save/_1 differ diff --git a/isim/SwapTest_isim_beh.exe.sim/work/SwapTest_isim_beh.exe_main.c b/isim/SwapTest_isim_beh.exe.sim/work/SwapTest_isim_beh.exe_main.c new file mode 100644 index 0000000..6fe603b --- /dev/null +++ b/isim/SwapTest_isim_beh.exe.sim/work/SwapTest_isim_beh.exe_main.c @@ -0,0 +1,40 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +#include "xsi.h" + +struct XSI_INFO xsi_info; + +char *IEEE_P_2592010699; +char *STD_STANDARD; + + +int main(int argc, char **argv) +{ + xsi_init_design(argc, argv); + xsi_register_info(&xsi_info); + + xsi_register_min_prec_unit(-12); + ieee_p_2592010699_init(); + work_a_2579272516_1004118533_init(); + work_a_0464846403_2372691052_init(); + + + xsi_register_tops("work_a_0464846403_2372691052"); + + IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699"); + xsi_register_ieee_std_logic_1164(IEEE_P_2592010699); + STD_STANDARD = xsi_get_engine_memory("std_standard"); + + return xsi_run_simulation(argc, argv); + +} diff --git a/isim/SwapTest_isim_beh.exe.sim/work/SwapTest_isim_beh.exe_main.lin64.o b/isim/SwapTest_isim_beh.exe.sim/work/SwapTest_isim_beh.exe_main.lin64.o new file mode 100644 index 0000000..189c260 Binary files /dev/null and b/isim/SwapTest_isim_beh.exe.sim/work/SwapTest_isim_beh.exe_main.lin64.o differ diff --git a/isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.c b/isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.c new file mode 100644 index 0000000..25f09c8 --- /dev/null +++ b/isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.c @@ -0,0 +1,157 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/SwapTest.vhd"; + + + +static void work_a_0464846403_2372691052_p_0(char *t0) +{ + char *t1; + char *t2; + char *t3; + char *t4; + char *t5; + char *t6; + int64 t7; + int64 t8; + +LAB0: t1 = (t0 + 3104U); + t2 = *((char **)t1); + if (t2 == 0) + goto LAB2; + +LAB3: goto *t2; + +LAB2: xsi_set_current_line(54, ng0); + t2 = (t0 + 3736); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(55, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t8 = (t7 / 2); + t2 = (t0 + 2912); + xsi_process_wait(t2, t8); + +LAB6: *((char **)t1) = &&LAB7; + +LAB1: return; +LAB4: xsi_set_current_line(56, ng0); + t2 = (t0 + 3736); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(57, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t8 = (t7 / 2); + t2 = (t0 + 2912); + xsi_process_wait(t2, t8); + +LAB10: *((char **)t1) = &&LAB11; + goto LAB1; + +LAB5: goto LAB4; + +LAB7: goto LAB5; + +LAB8: goto LAB2; + +LAB9: goto LAB8; + +LAB11: goto LAB9; + +} + +static void work_a_0464846403_2372691052_p_1(char *t0) +{ + char *t1; + char *t2; + int64 t3; + char *t4; + int64 t5; + +LAB0: t1 = (t0 + 3352U); + t2 = *((char **)t1); + if (t2 == 0) + goto LAB2; + +LAB3: goto *t2; + +LAB2: xsi_set_current_line(65, ng0); + t3 = (100 * 1000LL); + t2 = (t0 + 3160); + xsi_process_wait(t2, t3); + +LAB6: *((char **)t1) = &&LAB7; + +LAB1: return; +LAB4: xsi_set_current_line(67, ng0); + t2 = (t0 + 2128U); + t4 = *((char **)t2); + t3 = *((int64 *)t4); + t5 = (t3 * 10); + t2 = (t0 + 3160); + xsi_process_wait(t2, t5); + +LAB10: *((char **)t1) = &&LAB11; + goto LAB1; + +LAB5: goto LAB4; + +LAB7: goto LAB5; + +LAB8: xsi_set_current_line(71, ng0); + +LAB14: *((char **)t1) = &&LAB15; + goto LAB1; + +LAB9: goto LAB8; + +LAB11: goto LAB9; + +LAB12: goto LAB2; + +LAB13: goto LAB12; + +LAB15: goto LAB13; + +} + + +extern void work_a_0464846403_2372691052_init() +{ + static char *pe[] = {(void *)work_a_0464846403_2372691052_p_0,(void *)work_a_0464846403_2372691052_p_1}; + xsi_register_didat("work_a_0464846403_2372691052", "isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.didat"); + xsi_register_executes(pe); +} diff --git a/isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.didat b/isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.didat new file mode 100644 index 0000000..a0d6c8b Binary files /dev/null and b/isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.didat differ diff --git a/isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.lin64.o b/isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.lin64.o new file mode 100644 index 0000000..2dc3b58 Binary files /dev/null and b/isim/SwapTest_isim_beh.exe.sim/work/a_0464846403_2372691052.lin64.o differ diff --git a/isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.c b/isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.c new file mode 100644 index 0000000..056f514 --- /dev/null +++ b/isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.c @@ -0,0 +1,207 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/Swap.vhd"; +extern char *IEEE_P_2592010699; + +unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char ); + + +static void work_a_2579272516_1004118533_p_0(char *t0) +{ + int t1; + char *t2; + char *t3; + int t4; + int t5; + char *t6; + char *t7; + unsigned char t8; + unsigned char t9; + char *t10; + int t11; + int t12; + unsigned int t13; + unsigned int t14; + unsigned int t15; + char *t16; + unsigned char t17; + unsigned char t18; + char *t19; + char *t20; + unsigned char t21; + char *t22; + int t23; + int t24; + unsigned int t25; + unsigned int t26; + unsigned int t27; + char *t28; + unsigned char t29; + unsigned char t30; + unsigned char t31; + char *t32; + int t33; + int t34; + unsigned int t35; + unsigned int t36; + unsigned int t37; + char *t38; + char *t39; + char *t40; + char *t41; + char *t42; + +LAB0: xsi_set_current_line(18, ng0); + t1 = (8 - 1); + t2 = (t0 + 5109); + *((int *)t2) = t1; + t3 = (t0 + 5113); + *((int *)t3) = 0; + t4 = t1; + t5 = 0; + +LAB2: if (t4 >= t5) + goto LAB3; + +LAB5: t2 = (t0 + 3264); + *((int *)t2) = 1; + +LAB1: return; +LAB3: xsi_set_current_line(20, ng0); + t6 = (t0 + 1352U); + t7 = *((char **)t6); + t8 = *((unsigned char *)t7); + t9 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t8); + t6 = (t0 + 1032U); + t10 = *((char **)t6); + t6 = (t0 + 5109); + t11 = *((int *)t6); + t12 = (t11 - 7); + t13 = (t12 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t6)); + t14 = (1U * t13); + t15 = (0 + t14); + t16 = (t10 + t15); + t17 = *((unsigned char *)t16); + t18 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t9, t17); + t19 = (t0 + 1352U); + t20 = *((char **)t19); + t21 = *((unsigned char *)t20); + t19 = (t0 + 1192U); + t22 = *((char **)t19); + t19 = (t0 + 5109); + t23 = *((int *)t19); + t24 = (t23 - 7); + t25 = (t24 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t19)); + t26 = (1U * t25); + t27 = (0 + t26); + t28 = (t22 + t27); + t29 = *((unsigned char *)t28); + t30 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t21, t29); + t31 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t18, t30); + t32 = (t0 + 5109); + t33 = *((int *)t32); + t34 = (t33 - 7); + t35 = (t34 * -1); + t36 = (1 * t35); + t37 = (0U + t36); + t38 = (t0 + 3344); + t39 = (t38 + 56U); + t40 = *((char **)t39); + t41 = (t40 + 56U); + t42 = *((char **)t41); + *((unsigned char *)t42) = t31; + xsi_driver_first_trans_delta(t38, t37, 1, 0LL); + xsi_set_current_line(21, ng0); + t2 = (t0 + 1352U); + t3 = *((char **)t2); + t8 = *((unsigned char *)t3); + t9 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t8); + t2 = (t0 + 1192U); + t6 = *((char **)t2); + t2 = (t0 + 5109); + t1 = *((int *)t2); + t11 = (t1 - 7); + t13 = (t11 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t2)); + t14 = (1U * t13); + t15 = (0 + t14); + t7 = (t6 + t15); + t17 = *((unsigned char *)t7); + t18 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t9, t17); + t10 = (t0 + 1352U); + t16 = *((char **)t10); + t21 = *((unsigned char *)t16); + t10 = (t0 + 1032U); + t19 = *((char **)t10); + t10 = (t0 + 5109); + t12 = *((int *)t10); + t23 = (t12 - 7); + t25 = (t23 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t10)); + t26 = (1U * t25); + t27 = (0 + t26); + t20 = (t19 + t27); + t29 = *((unsigned char *)t20); + t30 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t21, t29); + t31 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t18, t30); + t22 = (t0 + 5109); + t24 = *((int *)t22); + t33 = (t24 - 7); + t35 = (t33 * -1); + t36 = (1 * t35); + t37 = (0U + t36); + t28 = (t0 + 3408); + t32 = (t28 + 56U); + t38 = *((char **)t32); + t39 = (t38 + 56U); + t40 = *((char **)t39); + *((unsigned char *)t40) = t31; + xsi_driver_first_trans_delta(t28, t37, 1, 0LL); + +LAB4: t2 = (t0 + 5109); + t4 = *((int *)t2); + t3 = (t0 + 5113); + t5 = *((int *)t3); + if (t4 == t5) + goto LAB5; + +LAB6: t1 = (t4 + -1); + t4 = t1; + t6 = (t0 + 5109); + *((int *)t6) = t4; + goto LAB2; + +} + + +extern void work_a_2579272516_1004118533_init() +{ + static char *pe[] = {(void *)work_a_2579272516_1004118533_p_0}; + xsi_register_didat("work_a_2579272516_1004118533", "isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.didat"); + xsi_register_executes(pe); +} diff --git a/isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.didat b/isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.didat new file mode 100644 index 0000000..841edee Binary files /dev/null and b/isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.didat differ diff --git a/isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.lin64.o b/isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.lin64.o new file mode 100644 index 0000000..c2ec3f3 Binary files /dev/null and b/isim/SwapTest_isim_beh.exe.sim/work/a_2579272516_1004118533.lin64.o differ diff --git a/isim/TypeCheck_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg b/isim/TypeCheck_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg new file mode 100644 index 0000000..66a8487 Binary files /dev/null and b/isim/TypeCheck_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg differ diff --git a/isim/TypeCheck_isim_beh.exe.sim/TypeCheck_isim_beh.exe b/isim/TypeCheck_isim_beh.exe.sim/TypeCheck_isim_beh.exe new file mode 100644 index 0000000..e9b3964 Binary files /dev/null and b/isim/TypeCheck_isim_beh.exe.sim/TypeCheck_isim_beh.exe differ diff --git a/isim/TypeCheck_isim_beh.exe.sim/isimcrash.log b/isim/TypeCheck_isim_beh.exe.sim/isimcrash.log new file mode 100644 index 0000000..e69de29 diff --git a/isim/TypeCheck_isim_beh.exe.sim/isimkernel.log b/isim/TypeCheck_isim_beh.exe.sim/isimkernel.log new file mode 100644 index 0000000..d292b74 --- /dev/null +++ b/isim/TypeCheck_isim_beh.exe.sim/isimkernel.log @@ -0,0 +1,28 @@ +Command line: + TypeCheck_isim_beh.exe + -simmode gui + -simrunnum 0 + -socket 60560 + +Tue Aug 27 12:53:49 2019 + + + Elaboration Time: 0.14 sec + + Current Memory Usage: 198.603 Meg + + Total Signals : 7 + Total Nets : 67 + Total Signal Drivers : 6 + Total Blocks : 2 + Total Primitive Blocks : 2 + Total Processes : 6 + Total Traceable Variables : 8 + Total Scalar Nets and Variables : 427 + + Total Simulation Time: 0.15 sec + + Current Memory Usage: 276.201 Meg + +Tue Aug 27 12:53:56 2019 + diff --git a/isim/TypeCheck_isim_beh.exe.sim/netId.dat b/isim/TypeCheck_isim_beh.exe.sim/netId.dat new file mode 100644 index 0000000..260dee8 Binary files /dev/null and b/isim/TypeCheck_isim_beh.exe.sim/netId.dat differ diff --git a/isim/TypeCheck_isim_beh.exe.sim/tmp_save/_1 b/isim/TypeCheck_isim_beh.exe.sim/tmp_save/_1 new file mode 100644 index 0000000..23b5de3 Binary files /dev/null and b/isim/TypeCheck_isim_beh.exe.sim/tmp_save/_1 differ diff --git a/isim/TypeCheck_isim_beh.exe.sim/work/TypeCheck_isim_beh.exe_main.c b/isim/TypeCheck_isim_beh.exe.sim/work/TypeCheck_isim_beh.exe_main.c new file mode 100644 index 0000000..89062b0 --- /dev/null +++ b/isim/TypeCheck_isim_beh.exe.sim/work/TypeCheck_isim_beh.exe_main.c @@ -0,0 +1,39 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +#include "xsi.h" + +struct XSI_INFO xsi_info; + +char *IEEE_P_2592010699; +char *STD_STANDARD; + + +int main(int argc, char **argv) +{ + xsi_init_design(argc, argv); + xsi_register_info(&xsi_info); + + xsi_register_min_prec_unit(-12); + ieee_p_2592010699_init(); + work_a_4228824053_1272247069_init(); + + + xsi_register_tops("work_a_4228824053_1272247069"); + + IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699"); + xsi_register_ieee_std_logic_1164(IEEE_P_2592010699); + STD_STANDARD = xsi_get_engine_memory("std_standard"); + + return xsi_run_simulation(argc, argv); + +} diff --git a/isim/TypeCheck_isim_beh.exe.sim/work/TypeCheck_isim_beh.exe_main.lin64.o b/isim/TypeCheck_isim_beh.exe.sim/work/TypeCheck_isim_beh.exe_main.lin64.o new file mode 100644 index 0000000..640b265 Binary files /dev/null and b/isim/TypeCheck_isim_beh.exe.sim/work/TypeCheck_isim_beh.exe_main.lin64.o differ diff --git a/isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.c b/isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.c new file mode 100644 index 0000000..f7c0beb --- /dev/null +++ b/isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.c @@ -0,0 +1,368 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/TypeCheck.vhd"; +extern char *IEEE_P_2592010699; + +unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char ); + + +static void work_a_4228824053_1272247069_p_0(char *t0) +{ + char *t1; + char *t2; + unsigned int t3; + unsigned int t4; + unsigned int t5; + char *t6; + char *t7; + char *t8; + char *t9; + char *t10; + char *t11; + +LAB0: xsi_set_current_line(17, ng0); + +LAB3: t1 = (t0 + 1032U); + t2 = *((char **)t1); + t3 = (31 - 30); + t4 = (t3 * 1U); + t5 = (0 + t4); + t1 = (t2 + t5); + t6 = (t0 + 5104); + t7 = (t6 + 56U); + t8 = *((char **)t7); + t9 = (t8 + 56U); + t10 = *((char **)t9); + memcpy(t10, t1, 8U); + xsi_driver_first_trans_fast(t6); + +LAB2: t11 = (t0 + 4944); + *((int *)t11) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + +static void work_a_4228824053_1272247069_p_1(char *t0) +{ + char *t1; + char *t2; + unsigned int t3; + unsigned int t4; + unsigned int t5; + char *t6; + char *t7; + char *t8; + char *t9; + char *t10; + char *t11; + +LAB0: xsi_set_current_line(18, ng0); + +LAB3: t1 = (t0 + 1032U); + t2 = *((char **)t1); + t3 = (31 - 22); + t4 = (t3 * 1U); + t5 = (0 + t4); + t1 = (t2 + t5); + t6 = (t0 + 5168); + t7 = (t6 + 56U); + t8 = *((char **)t7); + t9 = (t8 + 56U); + t10 = *((char **)t9); + memcpy(t10, t1, 23U); + xsi_driver_first_trans_fast(t6); + +LAB2: t11 = (t0 + 4960); + *((int *)t11) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + +static void work_a_4228824053_1272247069_p_2(char *t0) +{ + char *t1; + char *t2; + int t3; + int t4; + char *t5; + char *t6; + unsigned char t7; + char *t8; + int t9; + int t10; + unsigned int t11; + unsigned int t12; + unsigned int t13; + char *t14; + unsigned char t15; + unsigned char t16; + char *t17; + char *t18; + +LAB0: xsi_set_current_line(23, ng0); + t1 = (t0 + 2288U); + t2 = *((char **)t1); + t1 = (t2 + 0); + *((unsigned char *)t1) = (unsigned char)3; + xsi_set_current_line(24, ng0); + t1 = (t0 + 7635); + *((int *)t1) = 7; + t2 = (t0 + 7639); + *((int *)t2) = 0; + t3 = 7; + t4 = 0; + +LAB2: if (t3 >= t4) + goto LAB3; + +LAB5: xsi_set_current_line(27, ng0); + t1 = (t0 + 2288U); + t2 = *((char **)t1); + t7 = *((unsigned char *)t2); + t1 = (t0 + 5232); + t5 = (t1 + 56U); + t6 = *((char **)t5); + t8 = (t6 + 56U); + t14 = *((char **)t8); + *((unsigned char *)t14) = t7; + xsi_driver_first_trans_fast(t1); + t1 = (t0 + 4976); + *((int *)t1) = 1; + +LAB1: return; +LAB3: xsi_set_current_line(25, ng0); + t5 = (t0 + 2288U); + t6 = *((char **)t5); + t7 = *((unsigned char *)t6); + t5 = (t0 + 1512U); + t8 = *((char **)t5); + t5 = (t0 + 7635); + t9 = *((int *)t5); + t10 = (t9 - 7); + t11 = (t10 * -1); + t12 = (1U * t11); + t13 = (0 + t12); + t14 = (t8 + t13); + t15 = *((unsigned char *)t14); + t16 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t7, t15); + t17 = (t0 + 2288U); + t18 = *((char **)t17); + t17 = (t18 + 0); + *((unsigned char *)t17) = t16; + +LAB4: t1 = (t0 + 7635); + t3 = *((int *)t1); + t2 = (t0 + 7639); + t4 = *((int *)t2); + if (t3 == t4) + goto LAB5; + +LAB6: t9 = (t3 + -1); + t3 = t9; + t5 = (t0 + 7635); + *((int *)t5) = t3; + goto LAB2; + +} + +static void work_a_4228824053_1272247069_p_3(char *t0) +{ + char *t1; + char *t2; + int t3; + int t4; + char *t5; + char *t6; + unsigned char t7; + char *t8; + int t9; + int t10; + unsigned int t11; + unsigned int t12; + unsigned int t13; + char *t14; + unsigned char t15; + unsigned char t16; + char *t17; + char *t18; + +LAB0: xsi_set_current_line(33, ng0); + t1 = (t0 + 2408U); + t2 = *((char **)t1); + t1 = (t2 + 0); + *((unsigned char *)t1) = (unsigned char)2; + xsi_set_current_line(34, ng0); + t1 = (t0 + 7643); + *((int *)t1) = 22; + t2 = (t0 + 7647); + *((int *)t2) = 0; + t3 = 22; + t4 = 0; + +LAB2: if (t3 >= t4) + goto LAB3; + +LAB5: xsi_set_current_line(37, ng0); + t1 = (t0 + 2408U); + t2 = *((char **)t1); + t7 = *((unsigned char *)t2); + t1 = (t0 + 5296); + t5 = (t1 + 56U); + t6 = *((char **)t5); + t8 = (t6 + 56U); + t14 = *((char **)t8); + *((unsigned char *)t14) = t7; + xsi_driver_first_trans_fast(t1); + t1 = (t0 + 4992); + *((int *)t1) = 1; + +LAB1: return; +LAB3: xsi_set_current_line(35, ng0); + t5 = (t0 + 2408U); + t6 = *((char **)t5); + t7 = *((unsigned char *)t6); + t5 = (t0 + 1672U); + t8 = *((char **)t5); + t5 = (t0 + 7643); + t9 = *((int *)t5); + t10 = (t9 - 22); + t11 = (t10 * -1); + t12 = (1U * t11); + t13 = (0 + t12); + t14 = (t8 + t13); + t15 = *((unsigned char *)t14); + t16 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t7, t15); + t17 = (t0 + 2408U); + t18 = *((char **)t17); + t17 = (t18 + 0); + *((unsigned char *)t17) = t16; + +LAB4: t1 = (t0 + 7643); + t3 = *((int *)t1); + t2 = (t0 + 7647); + t4 = *((int *)t2); + if (t3 == t4) + goto LAB5; + +LAB6: t9 = (t3 + -1); + t3 = t9; + t5 = (t0 + 7643); + *((int *)t5) = t3; + goto LAB2; + +} + +static void work_a_4228824053_1272247069_p_4(char *t0) +{ + char *t1; + char *t2; + unsigned char t3; + char *t4; + unsigned char t5; + unsigned char t6; + char *t7; + char *t8; + char *t9; + char *t10; + char *t11; + +LAB0: xsi_set_current_line(40, ng0); + +LAB3: t1 = (t0 + 1832U); + t2 = *((char **)t1); + t3 = *((unsigned char *)t2); + t1 = (t0 + 1992U); + t4 = *((char **)t1); + t5 = *((unsigned char *)t4); + t6 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t3, t5); + t1 = (t0 + 5360); + t7 = (t1 + 56U); + t8 = *((char **)t7); + t9 = (t8 + 56U); + t10 = *((char **)t9); + *((unsigned char *)t10) = t6; + xsi_driver_first_trans_fast_port(t1); + +LAB2: t11 = (t0 + 5008); + *((int *)t11) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + +static void work_a_4228824053_1272247069_p_5(char *t0) +{ + char *t1; + char *t2; + unsigned char t3; + char *t4; + unsigned char t5; + unsigned char t6; + unsigned char t7; + char *t8; + char *t9; + char *t10; + char *t11; + char *t12; + +LAB0: xsi_set_current_line(41, ng0); + +LAB3: t1 = (t0 + 1832U); + t2 = *((char **)t1); + t3 = *((unsigned char *)t2); + t1 = (t0 + 1992U); + t4 = *((char **)t1); + t5 = *((unsigned char *)t4); + t6 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t5); + t7 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t3, t6); + t1 = (t0 + 5424); + t8 = (t1 + 56U); + t9 = *((char **)t8); + t10 = (t9 + 56U); + t11 = *((char **)t10); + *((unsigned char *)t11) = t7; + xsi_driver_first_trans_fast_port(t1); + +LAB2: t12 = (t0 + 5024); + *((int *)t12) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + + +extern void work_a_4228824053_1272247069_init() +{ + static char *pe[] = {(void *)work_a_4228824053_1272247069_p_0,(void *)work_a_4228824053_1272247069_p_1,(void *)work_a_4228824053_1272247069_p_2,(void *)work_a_4228824053_1272247069_p_3,(void *)work_a_4228824053_1272247069_p_4,(void *)work_a_4228824053_1272247069_p_5}; + xsi_register_didat("work_a_4228824053_1272247069", "isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.didat"); + xsi_register_executes(pe); +} diff --git a/isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.didat b/isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.didat new file mode 100644 index 0000000..78184d8 Binary files /dev/null and b/isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.didat differ diff --git a/isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.lin64.o b/isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.lin64.o new file mode 100644 index 0000000..e95c866 Binary files /dev/null and b/isim/TypeCheck_isim_beh.exe.sim/work/a_4228824053_1272247069.lin64.o differ diff --git a/isim/isim_usage_statistics.html b/isim/isim_usage_statistics.html index 58975fb..219a6a7 100644 --- a/isim/isim_usage_statistics.html +++ b/isim/isim_usage_statistics.html @@ -2,14 +2,14 @@ ISim Statistics Xilinx HDL Libraries Used=ieee -Fuse Resource Usage=980 ms, 657936 KB +Fuse Resource Usage=2640 ms, 103940 KB -Total Signals=15 -Total Nets=59 +Total Signals=11 +Total Nets=6 Total Blocks=3 -Total Processes=9 +Total Processes=4 Total Simulation Time=1 us -Simulation Resource Usage=0.03 sec, 271896 KB +Simulation Resource Usage=0.15 sec, 275152 KB Simulation Mode=gui Hardware CoSim=0 diff --git a/isim/isim_usage_statistics.html~ b/isim/isim_usage_statistics.html~ new file mode 100644 index 0000000..deb5c8f --- /dev/null +++ b/isim/isim_usage_statistics.html~ @@ -0,0 +1,27 @@ + + + + +<<<<<<< HEAD + + + + + + + + +======= + + + + + + + + +>>>>>>> 8b08af27823a5242424518ae45bac27cb9e28f6d + + + +
ISim Statistics
Xilinx HDL Libraries Used=ieee
Fuse Resource Usage=980 ms, 657936 KB
Total Signals=15
Total Nets=59
Total Blocks=3
Total Processes=9
Total Simulation Time=1 us
Simulation Resource Usage=0.03 sec, 271896 KB
Fuse Resource Usage=2640 ms, 103940 KB
Total Signals=11
Total Nets=6
Total Blocks=3
Total Processes=4
Total Simulation Time=1 us
Simulation Resource Usage=0.15 sec, 275152 KB
Simulation Mode=gui
Hardware CoSim=0
diff --git a/isim/pr_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg b/isim/pr_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg new file mode 100644 index 0000000..3f0864a Binary files /dev/null and b/isim/pr_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg differ diff --git a/isim/pr_isim_beh.exe.sim/isimcrash.log b/isim/pr_isim_beh.exe.sim/isimcrash.log new file mode 100644 index 0000000..e69de29 diff --git a/isim/pr_isim_beh.exe.sim/isimkernel.log b/isim/pr_isim_beh.exe.sim/isimkernel.log new file mode 100644 index 0000000..29b6b76 --- /dev/null +++ b/isim/pr_isim_beh.exe.sim/isimkernel.log @@ -0,0 +1,28 @@ +Command line: + pr_isim_beh.exe + -simmode gui + -simrunnum 0 + -socket 53338 + +Tue Aug 27 08:37:19 2019 + + + Elaboration Time: 0.13 sec + + Current Memory Usage: 198.603 Meg + + Total Signals : 7 + Total Nets : 49 + Total Signal Drivers : 5 + Total Blocks : 2 + Total Primitive Blocks : 2 + Total Processes : 5 + Total Traceable Variables : 9 + Total Scalar Nets and Variables : 410 + + Total Simulation Time: 0.14 sec + + Current Memory Usage: 276.201 Meg + +Tue Aug 27 08:37:30 2019 + diff --git a/isim/pr_isim_beh.exe.sim/netId.dat b/isim/pr_isim_beh.exe.sim/netId.dat new file mode 100644 index 0000000..b5a93b2 Binary files /dev/null and b/isim/pr_isim_beh.exe.sim/netId.dat differ diff --git a/isim/pr_isim_beh.exe.sim/pr_isim_beh.exe b/isim/pr_isim_beh.exe.sim/pr_isim_beh.exe new file mode 100644 index 0000000..f65eabb Binary files /dev/null and b/isim/pr_isim_beh.exe.sim/pr_isim_beh.exe differ diff --git a/isim/pr_isim_beh.exe.sim/tmp_save/_1 b/isim/pr_isim_beh.exe.sim/tmp_save/_1 new file mode 100644 index 0000000..d815201 Binary files /dev/null and b/isim/pr_isim_beh.exe.sim/tmp_save/_1 differ diff --git a/isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.c b/isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.c new file mode 100644 index 0000000..51267ac --- /dev/null +++ b/isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.c @@ -0,0 +1,325 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/pr.vhd"; +extern char *IEEE_P_2592010699; + +char *ieee_p_2592010699_sub_16439989832805790689_503743352(char *, char *, char *, char *, char *, char *); +char *ieee_p_2592010699_sub_207919886985903570_503743352(char *, char *, char *, char *); +unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char ); + + +static void work_a_2734820196_0181651160_p_0(char *t0) +{ + char t1[16]; + char t4[16]; + char *t2; + char *t3; + char *t5; + char *t6; + char *t7; + char *t8; + char *t9; + unsigned int t10; + unsigned int t11; + unsigned char t12; + char *t13; + char *t14; + char *t15; + char *t16; + char *t17; + char *t18; + +LAB0: xsi_set_current_line(18, ng0); + +LAB3: t2 = (t0 + 1032U); + t3 = *((char **)t2); + t2 = (t0 + 7008U); + t5 = (t0 + 1192U); + t6 = *((char **)t5); + t5 = (t0 + 7008U); + t7 = ieee_p_2592010699_sub_207919886985903570_503743352(IEEE_P_2592010699, t4, t6, t5); + t8 = ieee_p_2592010699_sub_16439989832805790689_503743352(IEEE_P_2592010699, t1, t3, t2, t7, t4); + t9 = (t1 + 12U); + t10 = *((unsigned int *)t9); + t11 = (1U * t10); + t12 = (8U != t11); + if (t12 == 1) + goto LAB5; + +LAB6: t13 = (t0 + 4840); + t14 = (t13 + 56U); + t15 = *((char **)t14); + t16 = (t15 + 56U); + t17 = *((char **)t16); + memcpy(t17, t8, 8U); + xsi_driver_first_trans_fast(t13); + +LAB2: t18 = (t0 + 4696); + *((int *)t18) = 1; + +LAB1: return; +LAB4: goto LAB2; + +LAB5: xsi_size_not_matching(8U, t11, 0); + goto LAB6; + +} + +static void work_a_2734820196_0181651160_p_1(char *t0) +{ + char t1[16]; + char t2[16]; + char *t3; + char *t4; + char *t5; + char *t6; + char *t7; + char *t8; + char *t9; + unsigned int t10; + unsigned int t11; + unsigned char t12; + char *t13; + char *t14; + char *t15; + char *t16; + char *t17; + char *t18; + +LAB0: xsi_set_current_line(19, ng0); + +LAB3: t3 = (t0 + 1032U); + t4 = *((char **)t3); + t3 = (t0 + 7008U); + t5 = ieee_p_2592010699_sub_207919886985903570_503743352(IEEE_P_2592010699, t2, t4, t3); + t6 = (t0 + 1192U); + t7 = *((char **)t6); + t6 = (t0 + 7008U); + t8 = ieee_p_2592010699_sub_16439989832805790689_503743352(IEEE_P_2592010699, t1, t5, t2, t7, t6); + t9 = (t1 + 12U); + t10 = *((unsigned int *)t9); + t11 = (1U * t10); + t12 = (8U != t11); + if (t12 == 1) + goto LAB5; + +LAB6: t13 = (t0 + 4904); + t14 = (t13 + 56U); + t15 = *((char **)t14); + t16 = (t15 + 56U); + t17 = *((char **)t16); + memcpy(t17, t8, 8U); + xsi_driver_first_trans_fast(t13); + +LAB2: t18 = (t0 + 4712); + *((int *)t18) = 1; + +LAB1: return; +LAB4: goto LAB2; + +LAB5: xsi_size_not_matching(8U, t11, 0); + goto LAB6; + +} + +static void work_a_2734820196_0181651160_p_2(char *t0) +{ + char *t1; + char *t2; + char *t3; + char *t4; + char *t5; + char *t6; + char *t7; + +LAB0: xsi_set_current_line(21, ng0); + +LAB3: t1 = (t0 + 1832U); + t2 = *((char **)t1); + t1 = (t0 + 4968); + t3 = (t1 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + memcpy(t6, t2, 8U); + xsi_driver_first_trans_fast_port(t1); + +LAB2: t7 = (t0 + 4728); + *((int *)t7) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + +static void work_a_2734820196_0181651160_p_3(char *t0) +{ + char *t1; + char *t2; + char *t3; + char *t4; + char *t5; + char *t6; + char *t7; + +LAB0: xsi_set_current_line(22, ng0); + +LAB3: t1 = (t0 + 1992U); + t2 = *((char **)t1); + t1 = (t0 + 5032); + t3 = (t1 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + memcpy(t6, t2, 8U); + xsi_driver_first_trans_fast_port(t1); + +LAB2: t7 = (t0 + 4744); + *((int *)t7) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + +static void work_a_2734820196_0181651160_p_4(char *t0) +{ + char *t1; + char *t2; + int t3; + int t4; + char *t5; + char *t6; + unsigned char t7; + char *t8; + int t9; + int t10; + unsigned int t11; + unsigned int t12; + unsigned int t13; + char *t14; + unsigned char t15; + unsigned char t16; + char *t17; + char *t18; + int t19; + int t20; + unsigned int t21; + unsigned int t22; + unsigned int t23; + char *t24; + unsigned char t25; + unsigned char t26; + unsigned char t27; + char *t28; + char *t29; + +LAB0: xsi_set_current_line(27, ng0); + t1 = (t0 + 2408U); + t2 = *((char **)t1); + t1 = (t2 + 0); + *((unsigned char *)t1) = (unsigned char)2; + xsi_set_current_line(28, ng0); + t1 = (t0 + 7117); + *((int *)t1) = 7; + t2 = (t0 + 7121); + *((int *)t2) = 0; + t3 = 7; + t4 = 0; + +LAB2: if (t3 >= t4) + goto LAB3; + +LAB5: xsi_set_current_line(31, ng0); + t1 = (t0 + 2408U); + t2 = *((char **)t1); + t7 = *((unsigned char *)t2); + t1 = (t0 + 5096); + t5 = (t1 + 56U); + t6 = *((char **)t5); + t8 = (t6 + 56U); + t14 = *((char **)t8); + *((unsigned char *)t14) = t7; + xsi_driver_first_trans_fast_port(t1); + t1 = (t0 + 4760); + *((int *)t1) = 1; + +LAB1: return; +LAB3: xsi_set_current_line(29, ng0); + t5 = (t0 + 2408U); + t6 = *((char **)t5); + t7 = *((unsigned char *)t6); + t5 = (t0 + 1832U); + t8 = *((char **)t5); + t5 = (t0 + 7117); + t9 = *((int *)t5); + t10 = (t9 - 7); + t11 = (t10 * -1); + t12 = (1U * t11); + t13 = (0 + t12); + t14 = (t8 + t13); + t15 = *((unsigned char *)t14); + t16 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t15); + t17 = (t0 + 1992U); + t18 = *((char **)t17); + t17 = (t0 + 7117); + t19 = *((int *)t17); + t20 = (t19 - 7); + t21 = (t20 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t17)); + t22 = (1U * t21); + t23 = (0 + t22); + t24 = (t18 + t23); + t25 = *((unsigned char *)t24); + t26 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t16, t25); + t27 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t7, t26); + t28 = (t0 + 2408U); + t29 = *((char **)t28); + t28 = (t29 + 0); + *((unsigned char *)t28) = t27; + +LAB4: t1 = (t0 + 7117); + t3 = *((int *)t1); + t2 = (t0 + 7121); + t4 = *((int *)t2); + if (t3 == t4) + goto LAB5; + +LAB6: t9 = (t3 + -1); + t3 = t9; + t5 = (t0 + 7117); + *((int *)t5) = t3; + goto LAB2; + +} + + +extern void work_a_2734820196_0181651160_init() +{ + static char *pe[] = {(void *)work_a_2734820196_0181651160_p_0,(void *)work_a_2734820196_0181651160_p_1,(void *)work_a_2734820196_0181651160_p_2,(void *)work_a_2734820196_0181651160_p_3,(void *)work_a_2734820196_0181651160_p_4}; + xsi_register_didat("work_a_2734820196_0181651160", "isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.didat"); + xsi_register_executes(pe); +} diff --git a/isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.didat b/isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.didat new file mode 100644 index 0000000..51d698d Binary files /dev/null and b/isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.didat differ diff --git a/isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.lin64.o b/isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.lin64.o new file mode 100644 index 0000000..001d23d Binary files /dev/null and b/isim/pr_isim_beh.exe.sim/work/a_2734820196_0181651160.lin64.o differ diff --git a/isim/pr_isim_beh.exe.sim/work/pr_isim_beh.exe_main.c b/isim/pr_isim_beh.exe.sim/work/pr_isim_beh.exe_main.c new file mode 100644 index 0000000..fb085d2 --- /dev/null +++ b/isim/pr_isim_beh.exe.sim/work/pr_isim_beh.exe_main.c @@ -0,0 +1,39 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +#include "xsi.h" + +struct XSI_INFO xsi_info; + +char *IEEE_P_2592010699; +char *STD_STANDARD; + + +int main(int argc, char **argv) +{ + xsi_init_design(argc, argv); + xsi_register_info(&xsi_info); + + xsi_register_min_prec_unit(-12); + ieee_p_2592010699_init(); + work_a_2734820196_0181651160_init(); + + + xsi_register_tops("work_a_2734820196_0181651160"); + + IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699"); + xsi_register_ieee_std_logic_1164(IEEE_P_2592010699); + STD_STANDARD = xsi_get_engine_memory("std_standard"); + + return xsi_run_simulation(argc, argv); + +} diff --git a/isim/pr_isim_beh.exe.sim/work/pr_isim_beh.exe_main.lin64.o b/isim/pr_isim_beh.exe.sim/work/pr_isim_beh.exe_main.lin64.o new file mode 100644 index 0000000..74ab686 Binary files /dev/null and b/isim/pr_isim_beh.exe.sim/work/pr_isim_beh.exe_main.lin64.o differ diff --git a/isim/precompiled.exe.sim/ieee/p_2592010699.c b/isim/precompiled.exe.sim/ieee/p_2592010699.c index 668613c..5b2548b 100644 --- a/isim/precompiled.exe.sim/ieee/p_2592010699.c +++ b/isim/precompiled.exe.sim/ieee/p_2592010699.c @@ -723,7 +723,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 7736); +LAB9: t46 = (t1 + 7752); xsi_report(t46, 65U, (unsigned char)3); goto LAB10; @@ -999,7 +999,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 7801); +LAB9: t46 = (t1 + 7817); xsi_report(t46, 65U, (unsigned char)3); goto LAB10; @@ -1280,7 +1280,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 7866); +LAB9: t46 = (t1 + 7882); xsi_report(t46, 66U, (unsigned char)3); goto LAB10; @@ -1571,7 +1571,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 7932); +LAB9: t46 = (t1 + 7948); xsi_report(t46, 66U, (unsigned char)3); goto LAB10; @@ -1853,7 +1853,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 7998); +LAB9: t46 = (t1 + 8014); xsi_report(t46, 64U, (unsigned char)3); goto LAB10; @@ -2129,7 +2129,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 8062); +LAB9: t46 = (t1 + 8078); xsi_report(t46, 64U, (unsigned char)3); goto LAB10; @@ -2410,7 +2410,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 8126); +LAB9: t46 = (t1 + 8142); xsi_report(t46, 65U, (unsigned char)3); goto LAB10; @@ -2701,7 +2701,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 8191); +LAB9: t46 = (t1 + 8207); xsi_report(t46, 65U, (unsigned char)3); goto LAB10; @@ -2983,7 +2983,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 8256); +LAB9: t46 = (t1 + 8272); xsi_report(t46, 65U, (unsigned char)3); goto LAB10; @@ -3259,7 +3259,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 8321); +LAB9: t46 = (t1 + 8337); xsi_report(t46, 65U, (unsigned char)3); goto LAB10; @@ -3540,7 +3540,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 8386); +LAB9: t46 = (t1 + 8402); xsi_report(t46, 66U, (unsigned char)3); goto LAB10; @@ -3831,7 +3831,7 @@ LAB6: if ((unsigned char)0 == 0) LAB10: goto LAB7; -LAB9: t46 = (t1 + 8452); +LAB9: t46 = (t1 + 8468); xsi_report(t46, 66U, (unsigned char)3); goto LAB10; diff --git a/isim/precompiled.exe.sim/ieee/p_2592010699.lin64.o b/isim/precompiled.exe.sim/ieee/p_2592010699.lin64.o index 3841218..338ffaa 100644 Binary files a/isim/precompiled.exe.sim/ieee/p_2592010699.lin64.o and b/isim/precompiled.exe.sim/ieee/p_2592010699.lin64.o differ diff --git a/isim/tb_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg b/isim/tb_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg new file mode 100644 index 0000000..5873436 Binary files /dev/null and b/isim/tb_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg differ diff --git a/isim/tb_isim_beh.exe.sim/isimcrash.log b/isim/tb_isim_beh.exe.sim/isimcrash.log new file mode 100644 index 0000000..e69de29 diff --git a/isim/tb_isim_beh.exe.sim/isimkernel.log b/isim/tb_isim_beh.exe.sim/isimkernel.log new file mode 100644 index 0000000..7b3c541 --- /dev/null +++ b/isim/tb_isim_beh.exe.sim/isimkernel.log @@ -0,0 +1,28 @@ +Command line: + tb_isim_beh.exe + -simmode gui + -simrunnum 0 + -socket 49451 + +Tue Aug 27 09:36:05 2019 + + + Elaboration Time: 0.12 sec + + Current Memory Usage: 198.607 Meg + + Total Signals : 13 + Total Nets : 50 + Total Signal Drivers : 6 + Total Blocks : 3 + Total Primitive Blocks : 2 + Total Processes : 7 + Total Traceable Variables : 10 + Total Scalar Nets and Variables : 412 + + Total Simulation Time: 0.13 sec + + Current Memory Usage: 276.206 Meg + +Tue Aug 27 09:36:11 2019 + diff --git a/isim/tb_isim_beh.exe.sim/netId.dat b/isim/tb_isim_beh.exe.sim/netId.dat new file mode 100644 index 0000000..ed50a88 Binary files /dev/null and b/isim/tb_isim_beh.exe.sim/netId.dat differ diff --git a/isim/tb_isim_beh.exe.sim/tb_isim_beh.exe b/isim/tb_isim_beh.exe.sim/tb_isim_beh.exe new file mode 100644 index 0000000..55f6555 Binary files /dev/null and b/isim/tb_isim_beh.exe.sim/tb_isim_beh.exe differ diff --git a/isim/tb_isim_beh.exe.sim/tmp_save/_1 b/isim/tb_isim_beh.exe.sim/tmp_save/_1 new file mode 100644 index 0000000..b86138c Binary files /dev/null and b/isim/tb_isim_beh.exe.sim/tmp_save/_1 differ diff --git a/isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.c b/isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.c new file mode 100644 index 0000000..265667f --- /dev/null +++ b/isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.c @@ -0,0 +1,374 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/pr.vhd"; +extern char *IEEE_P_2592010699; + +char *ieee_p_2592010699_sub_16439989832805790689_503743352(char *, char *, char *, char *, char *, char *); +char *ieee_p_2592010699_sub_207919886985903570_503743352(char *, char *, char *, char *); +unsigned char ieee_p_2592010699_sub_3488546069778340532_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_3488768496604610246_503743352(char *, unsigned char , unsigned char ); +unsigned char ieee_p_2592010699_sub_374109322130769762_503743352(char *, unsigned char ); + + +static void work_a_3230118638_0181651160_p_0(char *t0) +{ + char t1[16]; + char t4[16]; + char *t2; + char *t3; + char *t5; + char *t6; + char *t7; + char *t8; + char *t9; + unsigned int t10; + unsigned int t11; + unsigned char t12; + char *t13; + char *t14; + char *t15; + char *t16; + char *t17; + char *t18; + +LAB0: xsi_set_current_line(18, ng0); + +LAB3: t2 = (t0 + 1032U); + t3 = *((char **)t2); + t2 = (t0 + 7176U); + t5 = (t0 + 1192U); + t6 = *((char **)t5); + t5 = (t0 + 7192U); + t7 = ieee_p_2592010699_sub_207919886985903570_503743352(IEEE_P_2592010699, t4, t6, t5); + t8 = ieee_p_2592010699_sub_16439989832805790689_503743352(IEEE_P_2592010699, t1, t3, t2, t7, t4); + t9 = (t1 + 12U); + t10 = *((unsigned int *)t9); + t11 = (1U * t10); + t12 = (8U != t11); + if (t12 == 1) + goto LAB5; + +LAB6: t13 = (t0 + 4960); + t14 = (t13 + 56U); + t15 = *((char **)t14); + t16 = (t15 + 56U); + t17 = *((char **)t16); + memcpy(t17, t8, 8U); + xsi_driver_first_trans_fast(t13); + +LAB2: t18 = (t0 + 4816); + *((int *)t18) = 1; + +LAB1: return; +LAB4: goto LAB2; + +LAB5: xsi_size_not_matching(8U, t11, 0); + goto LAB6; + +} + +static void work_a_3230118638_0181651160_p_1(char *t0) +{ + char t1[16]; + char t2[16]; + char *t3; + char *t4; + char *t5; + char *t6; + char *t7; + char *t8; + char *t9; + unsigned int t10; + unsigned int t11; + unsigned char t12; + char *t13; + char *t14; + char *t15; + char *t16; + char *t17; + char *t18; + +LAB0: xsi_set_current_line(19, ng0); + +LAB3: t3 = (t0 + 1032U); + t4 = *((char **)t3); + t3 = (t0 + 7176U); + t5 = ieee_p_2592010699_sub_207919886985903570_503743352(IEEE_P_2592010699, t2, t4, t3); + t6 = (t0 + 1192U); + t7 = *((char **)t6); + t6 = (t0 + 7192U); + t8 = ieee_p_2592010699_sub_16439989832805790689_503743352(IEEE_P_2592010699, t1, t5, t2, t7, t6); + t9 = (t1 + 12U); + t10 = *((unsigned int *)t9); + t11 = (1U * t10); + t12 = (8U != t11); + if (t12 == 1) + goto LAB5; + +LAB6: t13 = (t0 + 5024); + t14 = (t13 + 56U); + t15 = *((char **)t14); + t16 = (t15 + 56U); + t17 = *((char **)t16); + memcpy(t17, t8, 8U); + xsi_driver_first_trans_fast(t13); + +LAB2: t18 = (t0 + 4832); + *((int *)t18) = 1; + +LAB1: return; +LAB4: goto LAB2; + +LAB5: xsi_size_not_matching(8U, t11, 0); + goto LAB6; + +} + +static void work_a_3230118638_0181651160_p_2(char *t0) +{ + char *t1; + char *t2; + char *t3; + char *t4; + char *t5; + char *t6; + char *t7; + +LAB0: xsi_set_current_line(21, ng0); + +LAB3: t1 = (t0 + 1832U); + t2 = *((char **)t1); + t1 = (t0 + 5088); + t3 = (t1 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + memcpy(t6, t2, 8U); + xsi_driver_first_trans_fast_port(t1); + +LAB2: t7 = (t0 + 4848); + *((int *)t7) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + +static void work_a_3230118638_0181651160_p_3(char *t0) +{ + char *t1; + char *t2; + char *t3; + char *t4; + char *t5; + char *t6; + char *t7; + +LAB0: xsi_set_current_line(22, ng0); + +LAB3: t1 = (t0 + 1992U); + t2 = *((char **)t1); + t1 = (t0 + 5152); + t3 = (t1 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + memcpy(t6, t2, 8U); + xsi_driver_first_trans_fast_port(t1); + +LAB2: t7 = (t0 + 4864); + *((int *)t7) = 1; + +LAB1: return; +LAB4: goto LAB2; + +} + +static void work_a_3230118638_0181651160_p_4(char *t0) +{ + char *t1; + char *t2; + int t3; + int t4; + int t5; + char *t6; + char *t7; + unsigned char t8; + char *t9; + int t10; + int t11; + unsigned int t12; + unsigned int t13; + unsigned int t14; + char *t15; + unsigned char t16; + unsigned char t17; + char *t18; + char *t19; + int t20; + int t21; + unsigned int t22; + unsigned int t23; + unsigned int t24; + char *t25; + unsigned char t26; + unsigned char t27; + char *t28; + char *t29; + unsigned char t30; + unsigned char t31; + unsigned char t32; + char *t33; + +LAB0: xsi_set_current_line(28, ng0); + t1 = (t0 + 2408U); + t2 = *((char **)t1); + t1 = (t2 + 0); + *((unsigned char *)t1) = (unsigned char)2; + xsi_set_current_line(29, ng0); + t1 = (t0 + 2528U); + t2 = *((char **)t1); + t1 = (t2 + 0); + *((unsigned char *)t1) = (unsigned char)3; + xsi_set_current_line(30, ng0); + t3 = (8 - 1); + t1 = (t0 + 7318); + *((int *)t1) = t3; + t2 = (t0 + 7322); + *((int *)t2) = 0; + t4 = t3; + t5 = 0; + +LAB2: if (t4 >= t5) + goto LAB3; + +LAB5: xsi_set_current_line(34, ng0); + t1 = (t0 + 2408U); + t2 = *((char **)t1); + t8 = *((unsigned char *)t2); + t1 = (t0 + 5216); + t6 = (t1 + 56U); + t7 = *((char **)t6); + t9 = (t7 + 56U); + t15 = *((char **)t9); + *((unsigned char *)t15) = t8; + xsi_driver_first_trans_fast_port(t1); + t1 = (t0 + 4880); + *((int *)t1) = 1; + +LAB1: return; +LAB3: xsi_set_current_line(31, ng0); + t6 = (t0 + 2408U); + t7 = *((char **)t6); + t8 = *((unsigned char *)t7); + t6 = (t0 + 1832U); + t9 = *((char **)t6); + t6 = (t0 + 7318); + t10 = *((int *)t6); + t11 = (t10 - 7); + t12 = (t11 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t6)); + t13 = (1U * t12); + t14 = (0 + t13); + t15 = (t9 + t14); + t16 = *((unsigned char *)t15); + t17 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t16); + t18 = (t0 + 1992U); + t19 = *((char **)t18); + t18 = (t0 + 7318); + t20 = *((int *)t18); + t21 = (t20 - 7); + t22 = (t21 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t18)); + t23 = (1U * t22); + t24 = (0 + t23); + t25 = (t19 + t24); + t26 = *((unsigned char *)t25); + t27 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t17, t26); + t28 = (t0 + 2528U); + t29 = *((char **)t28); + t30 = *((unsigned char *)t29); + t31 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t27, t30); + t32 = ieee_p_2592010699_sub_3488546069778340532_503743352(IEEE_P_2592010699, t8, t31); + t28 = (t0 + 2408U); + t33 = *((char **)t28); + t28 = (t33 + 0); + *((unsigned char *)t28) = t32; + xsi_set_current_line(32, ng0); + t1 = (t0 + 2528U); + t2 = *((char **)t1); + t8 = *((unsigned char *)t2); + t1 = (t0 + 1832U); + t6 = *((char **)t1); + t1 = (t0 + 7318); + t3 = *((int *)t1); + t10 = (t3 - 7); + t12 = (t10 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t1)); + t13 = (1U * t12); + t14 = (0 + t13); + t7 = (t6 + t14); + t16 = *((unsigned char *)t7); + t9 = (t0 + 1992U); + t15 = *((char **)t9); + t9 = (t0 + 7318); + t11 = *((int *)t9); + t20 = (t11 - 7); + t22 = (t20 * -1); + xsi_vhdl_check_range_of_index(7, 0, -1, *((int *)t9)); + t23 = (1U * t22); + t24 = (0 + t23); + t18 = (t15 + t24); + t17 = *((unsigned char *)t18); + t26 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t17); + t27 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t16, t26); + t30 = ieee_p_2592010699_sub_374109322130769762_503743352(IEEE_P_2592010699, t27); + t31 = ieee_p_2592010699_sub_3488768496604610246_503743352(IEEE_P_2592010699, t8, t30); + t19 = (t0 + 2528U); + t25 = *((char **)t19); + t19 = (t25 + 0); + *((unsigned char *)t19) = t31; + +LAB4: t1 = (t0 + 7318); + t4 = *((int *)t1); + t2 = (t0 + 7322); + t5 = *((int *)t2); + if (t4 == t5) + goto LAB5; + +LAB6: t3 = (t4 + -1); + t4 = t3; + t6 = (t0 + 7318); + *((int *)t6) = t4; + goto LAB2; + +} + + +extern void work_a_3230118638_0181651160_init() +{ + static char *pe[] = {(void *)work_a_3230118638_0181651160_p_0,(void *)work_a_3230118638_0181651160_p_1,(void *)work_a_3230118638_0181651160_p_2,(void *)work_a_3230118638_0181651160_p_3,(void *)work_a_3230118638_0181651160_p_4}; + xsi_register_didat("work_a_3230118638_0181651160", "isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.didat"); + xsi_register_executes(pe); +} diff --git a/isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.didat b/isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.didat new file mode 100644 index 0000000..c25fe90 Binary files /dev/null and b/isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.didat differ diff --git a/isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.lin64.o b/isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.lin64.o new file mode 100644 index 0000000..5616b2f Binary files /dev/null and b/isim/tb_isim_beh.exe.sim/work/a_3230118638_0181651160.lin64.o differ diff --git a/isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.c b/isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.c new file mode 100644 index 0000000..6a35d06 --- /dev/null +++ b/isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.c @@ -0,0 +1,157 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +/* This file is designed for use with ISim build 0xfbc00daa */ + +#define XSI_HIDE_SYMBOL_SPEC true +#include "xsi.h" +#include +#ifdef __GNUC__ +#include +#else +#include +#define alloca _alloca +#endif +static const char *ng0 = "/home/ise/gianni/IEEE754Adder/tb.vhd"; + + + +static void work_a_3671711236_2372691052_p_0(char *t0) +{ + char *t1; + char *t2; + char *t3; + char *t4; + char *t5; + char *t6; + int64 t7; + int64 t8; + +LAB0: t1 = (t0 + 3104U); + t2 = *((char **)t1); + if (t2 == 0) + goto LAB2; + +LAB3: goto *t2; + +LAB2: xsi_set_current_line(81, ng0); + t2 = (t0 + 3736); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)2; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(82, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t8 = (t7 / 2); + t2 = (t0 + 2912); + xsi_process_wait(t2, t8); + +LAB6: *((char **)t1) = &&LAB7; + +LAB1: return; +LAB4: xsi_set_current_line(83, ng0); + t2 = (t0 + 3736); + t3 = (t2 + 56U); + t4 = *((char **)t3); + t5 = (t4 + 56U); + t6 = *((char **)t5); + *((unsigned char *)t6) = (unsigned char)3; + xsi_driver_first_trans_fast(t2); + xsi_set_current_line(84, ng0); + t2 = (t0 + 2128U); + t3 = *((char **)t2); + t7 = *((int64 *)t3); + t8 = (t7 / 2); + t2 = (t0 + 2912); + xsi_process_wait(t2, t8); + +LAB10: *((char **)t1) = &&LAB11; + goto LAB1; + +LAB5: goto LAB4; + +LAB7: goto LAB5; + +LAB8: goto LAB2; + +LAB9: goto LAB8; + +LAB11: goto LAB9; + +} + +static void work_a_3671711236_2372691052_p_1(char *t0) +{ + char *t1; + char *t2; + int64 t3; + char *t4; + int64 t5; + +LAB0: t1 = (t0 + 3352U); + t2 = *((char **)t1); + if (t2 == 0) + goto LAB2; + +LAB3: goto *t2; + +LAB2: xsi_set_current_line(92, ng0); + t3 = (100 * 1000LL); + t2 = (t0 + 3160); + xsi_process_wait(t2, t3); + +LAB6: *((char **)t1) = &&LAB7; + +LAB1: return; +LAB4: xsi_set_current_line(94, ng0); + t2 = (t0 + 2128U); + t4 = *((char **)t2); + t3 = *((int64 *)t4); + t5 = (t3 * 10); + t2 = (t0 + 3160); + xsi_process_wait(t2, t5); + +LAB10: *((char **)t1) = &&LAB11; + goto LAB1; + +LAB5: goto LAB4; + +LAB7: goto LAB5; + +LAB8: xsi_set_current_line(98, ng0); + +LAB14: *((char **)t1) = &&LAB15; + goto LAB1; + +LAB9: goto LAB8; + +LAB11: goto LAB9; + +LAB12: goto LAB2; + +LAB13: goto LAB12; + +LAB15: goto LAB13; + +} + + +extern void work_a_3671711236_2372691052_init() +{ + static char *pe[] = {(void *)work_a_3671711236_2372691052_p_0,(void *)work_a_3671711236_2372691052_p_1}; + xsi_register_didat("work_a_3671711236_2372691052", "isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.didat"); + xsi_register_executes(pe); +} diff --git a/isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.didat b/isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.didat new file mode 100644 index 0000000..7db5223 Binary files /dev/null and b/isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.didat differ diff --git a/isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.lin64.o b/isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.lin64.o new file mode 100644 index 0000000..fd703b0 Binary files /dev/null and b/isim/tb_isim_beh.exe.sim/work/a_3671711236_2372691052.lin64.o differ diff --git a/isim/tb_isim_beh.exe.sim/work/tb_isim_beh.exe_main.c b/isim/tb_isim_beh.exe.sim/work/tb_isim_beh.exe_main.c new file mode 100644 index 0000000..ebf23f8 --- /dev/null +++ b/isim/tb_isim_beh.exe.sim/work/tb_isim_beh.exe_main.c @@ -0,0 +1,40 @@ +/**********************************************************************/ +/* ____ ____ */ +/* / /\/ / */ +/* /___/ \ / */ +/* \ \ \/ */ +/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */ +/* / / All Right Reserved. */ +/* /---/ /\ */ +/* \ \ / \ */ +/* \___\/\___\ */ +/***********************************************************************/ + +#include "xsi.h" + +struct XSI_INFO xsi_info; + +char *IEEE_P_2592010699; +char *STD_STANDARD; + + +int main(int argc, char **argv) +{ + xsi_init_design(argc, argv); + xsi_register_info(&xsi_info); + + xsi_register_min_prec_unit(-12); + ieee_p_2592010699_init(); + work_a_3230118638_0181651160_init(); + work_a_3671711236_2372691052_init(); + + + xsi_register_tops("work_a_3671711236_2372691052"); + + IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699"); + xsi_register_ieee_std_logic_1164(IEEE_P_2592010699); + STD_STANDARD = xsi_get_engine_memory("std_standard"); + + return xsi_run_simulation(argc, argv); + +} diff --git a/isim/tb_isim_beh.exe.sim/work/tb_isim_beh.exe_main.lin64.o b/isim/tb_isim_beh.exe.sim/work/tb_isim_beh.exe_main.lin64.o new file mode 100644 index 0000000..afd97e2 Binary files /dev/null and b/isim/tb_isim_beh.exe.sim/work/tb_isim_beh.exe_main.lin64.o differ diff --git a/isim/temp/comparator.vdb b/isim/temp/comparator.vdb new file mode 100644 index 0000000..aeff073 Binary files /dev/null and b/isim/temp/comparator.vdb differ diff --git a/isim/temp/comparatortest.vdb b/isim/temp/comparatortest.vdb new file mode 100644 index 0000000..f209a21 Binary files /dev/null and b/isim/temp/comparatortest.vdb differ diff --git a/isim/temp/fulladder.vdb b/isim/temp/fulladder.vdb new file mode 100644 index 0000000..835e550 Binary files /dev/null and b/isim/temp/fulladder.vdb differ diff --git a/isim/temp/fulladdertest.vdb b/isim/temp/fulladdertest.vdb new file mode 100644 index 0000000..aa7acff Binary files /dev/null and b/isim/temp/fulladdertest.vdb differ diff --git a/isim/temp/pr.vdb b/isim/temp/pr.vdb new file mode 100644 index 0000000..2c0b4b7 Binary files /dev/null and b/isim/temp/pr.vdb differ diff --git a/isim/temp/swap.vdb b/isim/temp/swap.vdb new file mode 100644 index 0000000..cf951a0 Binary files /dev/null and b/isim/temp/swap.vdb differ diff --git a/isim/temp/swaptest.vdb b/isim/temp/swaptest.vdb new file mode 100644 index 0000000..55a46bf Binary files /dev/null and b/isim/temp/swaptest.vdb differ diff --git a/isim/temp/tb.vdb b/isim/temp/tb.vdb new file mode 100644 index 0000000..f3c7195 Binary files /dev/null and b/isim/temp/tb.vdb differ diff --git a/isim/temp/typecheck.vdb b/isim/temp/typecheck.vdb index bb9ed3e..c93d054 100644 Binary files a/isim/temp/typecheck.vdb and b/isim/temp/typecheck.vdb differ diff --git a/isim/work/equalcheck.vdb b/isim/work/equalcheck.vdb deleted file mode 100644 index 0534aae..0000000 Binary files a/isim/work/equalcheck.vdb and /dev/null differ diff --git a/isim/work/fulladder.vdb b/isim/work/fulladder.vdb new file mode 100644 index 0000000..a4ff869 Binary files /dev/null and b/isim/work/fulladder.vdb differ diff --git a/isim/work/fulladdertest.vdb b/isim/work/fulladdertest.vdb new file mode 100644 index 0000000..332d9ef Binary files /dev/null and b/isim/work/fulladdertest.vdb differ diff --git a/isim/work/nancheck.vdb b/isim/work/nancheck.vdb deleted file mode 100644 index 8d2ef09..0000000 Binary files a/isim/work/nancheck.vdb and /dev/null differ diff --git a/isim/work/specialcasescheck.vdb b/isim/work/specialcasescheck.vdb deleted file mode 100644 index 9a0347b..0000000 Binary files a/isim/work/specialcasescheck.vdb and /dev/null differ diff --git a/isim/work/specialcasestest.vdb b/isim/work/specialcasestest.vdb deleted file mode 100644 index 5fc62d1..0000000 Binary files a/isim/work/specialcasestest.vdb and /dev/null differ diff --git a/isim/work/typecheck.vdb b/isim/work/typecheck.vdb deleted file mode 100644 index 518e49a..0000000 Binary files a/isim/work/typecheck.vdb and /dev/null differ diff --git a/isim/work/zerocheck.vdb b/isim/work/zerocheck.vdb deleted file mode 100644 index 3a254c1..0000000 Binary files a/isim/work/zerocheck.vdb and /dev/null differ diff --git a/pr.vhd b/pr.vhd new file mode 100644 index 0000000..c55c35d --- /dev/null +++ b/pr.vhd @@ -0,0 +1,38 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; + + +entity pr is + generic( BITCOUNT: integer := 8 ); + port( + xExp, yExp: in std_logic_vector((BITCOUNT-1) downto 0); + xOut, yOut: out std_logic_vector((BITCOUNT-1) downto 0); + needSwap: out std_logic + ); +end pr; + +architecture qwe of pr is + signal xGTy: std_logic_vector((BITCOUNT-1) downto 0); + signal yGTx: std_logic_vector((BITCOUNT-1) downto 0); +begin + xGTy <= xExp and (not yExp); + yGTx <= (not xExp) and yExp; + + xOut <= xGTy; + yOut <= yGTx; + + needSwap_compute: process (xGTy, yGTx) + variable SW: std_logic; + variable K: std_logic; + begin + SW := '0'; + k := '1'; + for i in (BITCOUNT-1) downto 0 loop + SW := SW or ((not(xGTy(i)) and yGTx(i)) and K); + K := K and (not(xGTy(i) and not(yGTx(i)))); + end loop; + needSwap <= SW; + end process; + +end qwe; + diff --git a/pr_isim_beh.exe b/pr_isim_beh.exe new file mode 100644 index 0000000..11ae4f7 Binary files /dev/null and b/pr_isim_beh.exe differ diff --git a/tb.vhd b/tb.vhd new file mode 100644 index 0000000..648af6f --- /dev/null +++ b/tb.vhd @@ -0,0 +1,101 @@ +-------------------------------------------------------------------------------- +-- Company: +-- Engineer: +-- +-- Create Date: 08:37:57 08/27/2019 +-- Design Name: +-- Module Name: /home/ise/gianni/IEEE754Adder/tb.vhd +-- Project Name: IEEE754Adder +-- Target Device: +-- Tool versions: +-- Description: +-- +-- VHDL Test Bench Created by ISE for module: pr +-- +-- Dependencies: +-- +-- Revision: +-- Revision 0.01 - File Created +-- Additional Comments: +-- +-- Notes: +-- This testbench has been automatically generated using types std_logic and +-- std_logic_vector for the ports of the unit under test. Xilinx recommends +-- that these types always be used for the top-level I/O of a design in order +-- to guarantee that the testbench will bind correctly to the post-implementation +-- simulation model. +-------------------------------------------------------------------------------- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; + +-- Uncomment the following library declaration if using +-- arithmetic functions with Signed or Unsigned values +--USE ieee.numeric_std.ALL; + +ENTITY tb IS +END tb; + +ARCHITECTURE behavior OF tb IS + + -- Component Declaration for the Unit Under Test (UUT) + + COMPONENT pr + PORT( + xExp : IN std_logic_vector(7 downto 0); + yExp : IN std_logic_vector(7 downto 0); + xOut : OUT std_logic_vector(7 downto 0); + yOut : OUT std_logic_vector(7 downto 0); + needSwap : OUT std_logic + ); + END COMPONENT; + + + --Inputs + signal xExp : std_logic_vector(7 downto 0) := "01010101"; + signal yExp : std_logic_vector(7 downto 0) := "01010001"; + + --Outputs + signal xOut : std_logic_vector(7 downto 0); + signal yOut : std_logic_vector(7 downto 0); + signal needSwap : std_logic; + signal clock: std_logic; + -- No clocks detected in port list. Replace clock below with + -- appropriate port name + + constant clock_period : time := 10 ns; + +BEGIN + + -- Instantiate the Unit Under Test (UUT) + uut: pr PORT MAP ( + xExp => xExp, + yExp => yExp, + xOut => xOut, + yOut => yOut, + needSwap => needSwap + ); + + -- Clock process definitions + clock_process :process + begin + clock <= '0'; + wait for clock_period/2; + clock <= '1'; + wait for clock_period/2; + end process; + + + -- Stimulus process + stim_proc: process + begin + -- hold reset state for 100 ns. + wait for 100 ns; + + wait for clock_period*10; + + -- insert stimulus here + + wait; + end process; + +END; diff --git a/tb_isim_beh.exe b/tb_isim_beh.exe new file mode 100644 index 0000000..11ae4f7 Binary files /dev/null and b/tb_isim_beh.exe differ diff --git a/tb_isim_beh.wdb b/tb_isim_beh.wdb new file mode 100644 index 0000000..25fcf2f Binary files /dev/null and b/tb_isim_beh.wdb differ diff --git a/xilinxsim.ini b/xilinxsim.ini index 600496d..a023645 100644 --- a/xilinxsim.ini +++ b/xilinxsim.ini @@ -1 +1 @@ -work=isim/work +isim_temp=isim/temp