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/home/Luca/ISE/IEEE754Adder/ZeroCounterTest.vhd/opt/Xilinx/14.7/ISE_DS/ISE/vhdl/src/ieee/std_logic_1164.vhd/opt/Xilinx/14.7/ISE_DS/ISE/vhdl/src/ieee/numeric_std.vhd/home/Luca/ISE/IEEE754Adder/ZeroCounter.vhdstd_ulogic'U''X''0''1''Z''W''L''H''-'std_ulogic_vectorstd_logic'U''X''0''1''Z''W''L''H''-'std_logic_vectorx01'X''0''1'x01z'X''0''1''Z'ux01'U''X''0''1'ux01z'U''X''0''1''Z'stdlogic_1dBasestdlogic_1dstdlogic_tableBasestdlogic_tablelogic_x01_tableBaselogic_x01_tablelogic_x01z_tableBaselogic_x01z_tablelogic_ux01_tableBaselogic_ux01_tableunsignedsignedboolean_tableBasebooleanFALSETRUEboolean_table_top_topzerocountertestzerocountertestbehaviorxz_countall_zerosclockclock_periodtimefspsnsusmssecminhrstd_logic_1164std_logic_1164resolution_table/build/xfndry10/P.20131013/rtf/vhdl/src/ieee/std_logic_1164.vhdand_tableor_tablexor_tablenot_tablecvt_to_x01cvt_to_x01zcvt_to_ux01numeric_stdnumeric_stdnau/build/xfndry10/P.20131013/rtf/vhdl/src/ieee/numeric_std.vhdnasno_warningmatch_tablecopyrightnoticestringcharacterNULSOHSTXETXEOTENQACKBELBSHTLFVTFFCRSOSIDLEDC1DC2DC3DC4NAKSYNETBCANEMSUBESCFSPGSPRSPUSP' ''!''"''#''$''%''&'''''('')''*''+'',''-''.''/''0''1''2''3''4''5''6''7''8''9'':'';''<''=''>''?''@''A''B''C''D''E''F''G''H''I''J''K''L''M''N''O''P''Q''R''S''T''U''V''W''X''Y''Z''[''\'']''^''_''`''a''b''c''d''e''f''g''h''i''j''k''l''m''n''o''p''q''r''s''t''u''v''w''x''y''z''{''|''}''~'DELC128C129C130C131C132C133C134C135C136C137C138C139C140C141C142C143C144C145C146C147C148C149C150C151C152C153C154C155C156C157C158C159'<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>''<27>'uutZeroCounterZeroCounterArchxz_countall_zerosbitcountintegerres_bitcount:clock_processzerocountertest:stim_proczerocountertest:ZEROCOUNT_PROCESSZeroCounterzcbin_npart_zc:ALLZERO_PROCESSZeroCounteraz