64 lines
1.7 KiB
VHDL
64 lines
1.7 KiB
VHDL
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--
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-- Package File Template
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--
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-- Purpose: This package defines supplemental types, subtypes,
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-- constants, and functions
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--
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-- To use any of the example code shown below, uncomment the lines and modify as necessary
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--
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library IEEE;
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use IEEE.STD_LOGIC_1164.all;
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package UTILS is
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-- type <new_type> is
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-- record
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-- <type_name> : std_logic_vector( 7 downto 0);
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-- <type_name> : std_logic;
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-- end record;
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--
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-- Declare constants
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--
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-- constant <constant_name> : time := <time_unit> ns;
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-- constant <constant_name> : integer := <value;
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--
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-- Declare functions and procedure
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--
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-- function <function_name> (signal <signal_name> : in <type_declaration>) return <type_declaration>;
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-- procedure <procedure_name> (<type_declaration> <constant_name> : in <type_declaration>);
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--
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type ARRAY_OF_STD_LOGIC48 is array (0 to 512) of std_logic_vector(47 downto 0);
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end UTILS;
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package body UTILS is
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---- Example 1
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-- function <function_name> (signal <signal_name> : in <type_declaration> ) return <type_declaration> is
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-- variable <variable_name> : <type_declaration>;
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-- begin
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-- <variable_name> := <signal_name> xor <signal_name>;
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-- return <variable_name>;
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-- end <function_name>;
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---- Example 2
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-- function <function_name> (signal <signal_name> : in <type_declaration>;
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-- signal <signal_name> : in <type_declaration> ) return <type_declaration> is
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-- begin
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-- if (<signal_name> = '1') then
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-- return <signal_name>;
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-- else
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-- return 'Z';
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-- end if;
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-- end <function_name>;
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---- Procedure Example
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-- procedure <procedure_name> (<type_declaration> <constant_name> : in <type_declaration>) is
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--
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-- begin
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--
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-- end <procedure_name>;
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end UTILS;
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